139a230aaSStefan Roese/* 239a230aaSStefan Roese * Device Tree file for Marvell Armada 385 development board 339a230aaSStefan Roese * (RD-88F6820-GP) 439a230aaSStefan Roese * 539a230aaSStefan Roese * Copyright (C) 2014 Marvell 639a230aaSStefan Roese * 739a230aaSStefan Roese * Gregory CLEMENT <gregory.clement@free-electrons.com> 839a230aaSStefan Roese * 939a230aaSStefan Roese * This file is dual-licensed: you can use it either under the terms 1039a230aaSStefan Roese * of the GPL or the X11 license, at your option. Note that this dual 1139a230aaSStefan Roese * licensing only applies to this file, and not this project as a 1239a230aaSStefan Roese * whole. 1339a230aaSStefan Roese * 1439a230aaSStefan Roese * a) This file is licensed under the terms of the GNU General Public 1539a230aaSStefan Roese * License version 2. This program is licensed "as is" without 1639a230aaSStefan Roese * any warranty of any kind, whether express or implied. 1739a230aaSStefan Roese * 1839a230aaSStefan Roese * Or, alternatively, 1939a230aaSStefan Roese * 2039a230aaSStefan Roese * b) Permission is hereby granted, free of charge, to any person 2139a230aaSStefan Roese * obtaining a copy of this software and associated documentation 2239a230aaSStefan Roese * files (the "Software"), to deal in the Software without 2339a230aaSStefan Roese * restriction, including without limitation the rights to use, 2439a230aaSStefan Roese * copy, modify, merge, publish, distribute, sublicense, and/or 2539a230aaSStefan Roese * sell copies of the Software, and to permit persons to whom the 2639a230aaSStefan Roese * Software is furnished to do so, subject to the following 2739a230aaSStefan Roese * conditions: 2839a230aaSStefan Roese * 2939a230aaSStefan Roese * The above copyright notice and this permission notice shall be 3039a230aaSStefan Roese * included in all copies or substantial portions of the Software. 3139a230aaSStefan Roese * 3239a230aaSStefan Roese * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 3339a230aaSStefan Roese * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 3439a230aaSStefan Roese * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 3539a230aaSStefan Roese * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 3639a230aaSStefan Roese * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 3739a230aaSStefan Roese * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 3839a230aaSStefan Roese * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 3939a230aaSStefan Roese * OTHER DEALINGS IN THE SOFTWARE. 4039a230aaSStefan Roese */ 4139a230aaSStefan Roese 4239a230aaSStefan Roese/dts-v1/; 4339a230aaSStefan Roese#include "armada-388.dtsi" 4439a230aaSStefan Roese#include <dt-bindings/gpio/gpio.h> 4539a230aaSStefan Roese 4639a230aaSStefan Roese/ { 4739a230aaSStefan Roese model = "Marvell Armada 385 GP"; 4839a230aaSStefan Roese compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; 4939a230aaSStefan Roese 5039a230aaSStefan Roese chosen { 5139a230aaSStefan Roese stdout-path = "serial0:115200n8"; 5239a230aaSStefan Roese }; 5339a230aaSStefan Roese 5409a54c00SStefan Roese aliases { 55202ededdSStefan Roese ethernet0 = ð0; 56202ededdSStefan Roese ethernet1 = ð1; 5709a54c00SStefan Roese spi0 = &spi0; 5809a54c00SStefan Roese }; 5909a54c00SStefan Roese 6039a230aaSStefan Roese memory { 6139a230aaSStefan Roese device_type = "memory"; 6239a230aaSStefan Roese reg = <0x00000000 0x80000000>; /* 2 GB */ 6339a230aaSStefan Roese }; 6439a230aaSStefan Roese 6539a230aaSStefan Roese soc { 6639a230aaSStefan Roese ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 6739a230aaSStefan Roese MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>; 6839a230aaSStefan Roese 6939a230aaSStefan Roese internal-regs { 7039a230aaSStefan Roese spi@10600 { 7139a230aaSStefan Roese pinctrl-names = "default"; 7239a230aaSStefan Roese pinctrl-0 = <&spi0_pins>; 7339a230aaSStefan Roese status = "okay"; 7409a54c00SStefan Roese u-boot,dm-pre-reloc; 7539a230aaSStefan Roese 7639a230aaSStefan Roese spi-flash@0 { 7709a54c00SStefan Roese u-boot,dm-pre-reloc; 7839a230aaSStefan Roese #address-cells = <1>; 7939a230aaSStefan Roese #size-cells = <1>; 8039a230aaSStefan Roese compatible = "st,m25p128", "jedec,spi-nor"; 8139a230aaSStefan Roese reg = <0>; /* Chip select 0 */ 8239a230aaSStefan Roese spi-max-frequency = <50000000>; 8339a230aaSStefan Roese m25p,fast-read; 8439a230aaSStefan Roese }; 8539a230aaSStefan Roese }; 8639a230aaSStefan Roese 8739a230aaSStefan Roese i2c@11000 { 8839a230aaSStefan Roese pinctrl-names = "default"; 8939a230aaSStefan Roese pinctrl-0 = <&i2c0_pins>; 9039a230aaSStefan Roese status = "okay"; 9139a230aaSStefan Roese clock-frequency = <100000>; 9239a230aaSStefan Roese /* 9339a230aaSStefan Roese * The EEPROM located at adresse 54 is needed 9439a230aaSStefan Roese * for the boot - DO NOT ERASE IT - 9539a230aaSStefan Roese */ 9639a230aaSStefan Roese 9739a230aaSStefan Roese expander0: pca9555@20 { 9839a230aaSStefan Roese compatible = "nxp,pca9555"; 9939a230aaSStefan Roese pinctrl-names = "default"; 10039a230aaSStefan Roese pinctrl-0 = <&pca0_pins>; 10139a230aaSStefan Roese interrupt-parent = <&gpio0>; 10239a230aaSStefan Roese interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 10339a230aaSStefan Roese gpio-controller; 10439a230aaSStefan Roese #gpio-cells = <2>; 10539a230aaSStefan Roese interrupt-controller; 10639a230aaSStefan Roese #interrupt-cells = <2>; 10739a230aaSStefan Roese reg = <0x20>; 10839a230aaSStefan Roese }; 10939a230aaSStefan Roese 11039a230aaSStefan Roese expander1: pca9555@21 { 11139a230aaSStefan Roese compatible = "nxp,pca9555"; 11239a230aaSStefan Roese pinctrl-names = "default"; 11339a230aaSStefan Roese interrupt-parent = <&gpio0>; 11439a230aaSStefan Roese interrupts = <18 IRQ_TYPE_EDGE_FALLING>; 11539a230aaSStefan Roese gpio-controller; 11639a230aaSStefan Roese #gpio-cells = <2>; 11739a230aaSStefan Roese interrupt-controller; 11839a230aaSStefan Roese #interrupt-cells = <2>; 11939a230aaSStefan Roese reg = <0x21>; 12039a230aaSStefan Roese }; 12139a230aaSStefan Roese 12239a230aaSStefan Roese }; 12339a230aaSStefan Roese 12439a230aaSStefan Roese serial@12000 { 12539a230aaSStefan Roese /* 12639a230aaSStefan Roese * Exported on the micro USB connector CON16 12739a230aaSStefan Roese * through an FTDI 12839a230aaSStefan Roese */ 12939a230aaSStefan Roese 13039a230aaSStefan Roese pinctrl-names = "default"; 13139a230aaSStefan Roese pinctrl-0 = <&uart0_pins>; 13239a230aaSStefan Roese status = "okay"; 1336451223aSStefan Roese u-boot,dm-pre-reloc; 13439a230aaSStefan Roese }; 13539a230aaSStefan Roese 13639a230aaSStefan Roese /* GE1 CON15 */ 13739a230aaSStefan Roese ethernet@30000 { 13839a230aaSStefan Roese pinctrl-names = "default"; 13939a230aaSStefan Roese pinctrl-0 = <&ge1_rgmii_pins>; 14039a230aaSStefan Roese status = "okay"; 14139a230aaSStefan Roese phy = <&phy1>; 14239a230aaSStefan Roese phy-mode = "rgmii-id"; 14339a230aaSStefan Roese }; 14439a230aaSStefan Roese 14539a230aaSStefan Roese /* CON4 */ 14639a230aaSStefan Roese usb@58000 { 14739a230aaSStefan Roese vcc-supply = <®_usb2_0_vbus>; 14839a230aaSStefan Roese status = "okay"; 14939a230aaSStefan Roese }; 15039a230aaSStefan Roese 15139a230aaSStefan Roese /* GE0 CON1 */ 15239a230aaSStefan Roese ethernet@70000 { 15339a230aaSStefan Roese pinctrl-names = "default"; 15439a230aaSStefan Roese /* 15539a230aaSStefan Roese * The Reference Clock 0 is used to provide a 15639a230aaSStefan Roese * clock to the PHY 15739a230aaSStefan Roese */ 15839a230aaSStefan Roese pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; 15939a230aaSStefan Roese status = "okay"; 16039a230aaSStefan Roese phy = <&phy0>; 16139a230aaSStefan Roese phy-mode = "rgmii-id"; 16239a230aaSStefan Roese }; 16339a230aaSStefan Roese 16439a230aaSStefan Roese 16539a230aaSStefan Roese mdio@72004 { 16639a230aaSStefan Roese pinctrl-names = "default"; 16739a230aaSStefan Roese pinctrl-0 = <&mdio_pins>; 16839a230aaSStefan Roese 16939a230aaSStefan Roese phy0: ethernet-phy@1 { 17039a230aaSStefan Roese reg = <1>; 17139a230aaSStefan Roese }; 17239a230aaSStefan Roese 17339a230aaSStefan Roese phy1: ethernet-phy@0 { 17439a230aaSStefan Roese reg = <0>; 17539a230aaSStefan Roese }; 17639a230aaSStefan Roese }; 17739a230aaSStefan Roese 17839a230aaSStefan Roese sata@a8000 { 17939a230aaSStefan Roese pinctrl-names = "default"; 18039a230aaSStefan Roese pinctrl-0 = <&sata0_pins>, <&sata1_pins>; 18139a230aaSStefan Roese status = "okay"; 18239a230aaSStefan Roese #address-cells = <1>; 18339a230aaSStefan Roese #size-cells = <0>; 18439a230aaSStefan Roese 18539a230aaSStefan Roese sata0: sata-port@0 { 18639a230aaSStefan Roese reg = <0>; 18739a230aaSStefan Roese target-supply = <®_5v_sata0>; 18839a230aaSStefan Roese }; 18939a230aaSStefan Roese 19039a230aaSStefan Roese sata1: sata-port@1 { 19139a230aaSStefan Roese reg = <1>; 19239a230aaSStefan Roese target-supply = <®_5v_sata1>; 19339a230aaSStefan Roese }; 19439a230aaSStefan Roese }; 19539a230aaSStefan Roese 19639a230aaSStefan Roese sata@e0000 { 19739a230aaSStefan Roese pinctrl-names = "default"; 19839a230aaSStefan Roese pinctrl-0 = <&sata2_pins>, <&sata3_pins>; 19939a230aaSStefan Roese status = "okay"; 20039a230aaSStefan Roese #address-cells = <1>; 20139a230aaSStefan Roese #size-cells = <0>; 20239a230aaSStefan Roese 20339a230aaSStefan Roese sata2: sata-port@0 { 20439a230aaSStefan Roese reg = <0>; 20539a230aaSStefan Roese target-supply = <®_5v_sata2>; 20639a230aaSStefan Roese }; 20739a230aaSStefan Roese 20839a230aaSStefan Roese sata3: sata-port@1 { 20939a230aaSStefan Roese reg = <1>; 21039a230aaSStefan Roese target-supply = <®_5v_sata3>; 21139a230aaSStefan Roese }; 21239a230aaSStefan Roese }; 21339a230aaSStefan Roese 21439a230aaSStefan Roese sdhci@d8000 { 21539a230aaSStefan Roese pinctrl-names = "default"; 21639a230aaSStefan Roese pinctrl-0 = <&sdhci_pins>; 21739a230aaSStefan Roese cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; 21839a230aaSStefan Roese no-1-8-v; 21939a230aaSStefan Roese wp-inverted; 22039a230aaSStefan Roese bus-width = <8>; 22139a230aaSStefan Roese status = "okay"; 22239a230aaSStefan Roese }; 22339a230aaSStefan Roese 22439a230aaSStefan Roese /* CON5 */ 22539a230aaSStefan Roese usb3@f0000 { 22639a230aaSStefan Roese vcc-supply = <®_usb2_1_vbus>; 22739a230aaSStefan Roese status = "okay"; 22839a230aaSStefan Roese }; 22939a230aaSStefan Roese 23039a230aaSStefan Roese /* CON7 */ 23139a230aaSStefan Roese usb3@f8000 { 23239a230aaSStefan Roese vcc-supply = <®_usb3_vbus>; 23339a230aaSStefan Roese status = "okay"; 23439a230aaSStefan Roese }; 23539a230aaSStefan Roese }; 23639a230aaSStefan Roese 237*825dd50fSChris Packham pcie { 23839a230aaSStefan Roese status = "okay"; 23939a230aaSStefan Roese /* 24039a230aaSStefan Roese * One PCIe units is accessible through 24139a230aaSStefan Roese * standard PCIe slot on the board. 24239a230aaSStefan Roese */ 24339a230aaSStefan Roese pcie@1,0 { 24439a230aaSStefan Roese /* Port 0, Lane 0 */ 24539a230aaSStefan Roese status = "okay"; 24639a230aaSStefan Roese }; 24739a230aaSStefan Roese 24839a230aaSStefan Roese /* 24939a230aaSStefan Roese * The two other PCIe units are accessible 25039a230aaSStefan Roese * through mini PCIe slot on the board. 25139a230aaSStefan Roese */ 25239a230aaSStefan Roese pcie@2,0 { 25339a230aaSStefan Roese /* Port 1, Lane 0 */ 25439a230aaSStefan Roese status = "okay"; 25539a230aaSStefan Roese }; 25639a230aaSStefan Roese pcie@3,0 { 25739a230aaSStefan Roese /* Port 2, Lane 0 */ 25839a230aaSStefan Roese status = "okay"; 25939a230aaSStefan Roese }; 26039a230aaSStefan Roese }; 26139a230aaSStefan Roese 26239a230aaSStefan Roese gpio-fan { 26339a230aaSStefan Roese compatible = "gpio-fan"; 26439a230aaSStefan Roese gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; 26539a230aaSStefan Roese gpio-fan,speed-map = < 0 0 26639a230aaSStefan Roese 3000 1>; 26739a230aaSStefan Roese }; 26839a230aaSStefan Roese }; 26939a230aaSStefan Roese 27039a230aaSStefan Roese reg_usb3_vbus: usb3-vbus { 27139a230aaSStefan Roese compatible = "regulator-fixed"; 27239a230aaSStefan Roese regulator-name = "usb3-vbus"; 27339a230aaSStefan Roese regulator-min-microvolt = <5000000>; 27439a230aaSStefan Roese regulator-max-microvolt = <5000000>; 27539a230aaSStefan Roese enable-active-high; 27639a230aaSStefan Roese regulator-always-on; 27739a230aaSStefan Roese gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; 27839a230aaSStefan Roese }; 27939a230aaSStefan Roese 28039a230aaSStefan Roese reg_usb2_0_vbus: v5-vbus0 { 28139a230aaSStefan Roese compatible = "regulator-fixed"; 28239a230aaSStefan Roese regulator-name = "v5.0-vbus0"; 28339a230aaSStefan Roese regulator-min-microvolt = <5000000>; 28439a230aaSStefan Roese regulator-max-microvolt = <5000000>; 28539a230aaSStefan Roese enable-active-high; 28639a230aaSStefan Roese regulator-always-on; 28739a230aaSStefan Roese gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; 28839a230aaSStefan Roese }; 28939a230aaSStefan Roese 29039a230aaSStefan Roese reg_usb2_1_vbus: v5-vbus1 { 29139a230aaSStefan Roese compatible = "regulator-fixed"; 29239a230aaSStefan Roese regulator-name = "v5.0-vbus1"; 29339a230aaSStefan Roese regulator-min-microvolt = <5000000>; 29439a230aaSStefan Roese regulator-max-microvolt = <5000000>; 29539a230aaSStefan Roese enable-active-high; 29639a230aaSStefan Roese regulator-always-on; 29739a230aaSStefan Roese gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 29839a230aaSStefan Roese }; 29939a230aaSStefan Roese 30039a230aaSStefan Roese reg_usb2_1_vbus: v5-vbus1 { 30139a230aaSStefan Roese compatible = "regulator-fixed"; 30239a230aaSStefan Roese regulator-name = "v5.0-vbus1"; 30339a230aaSStefan Roese regulator-min-microvolt = <5000000>; 30439a230aaSStefan Roese regulator-max-microvolt = <5000000>; 30539a230aaSStefan Roese enable-active-high; 30639a230aaSStefan Roese regulator-always-on; 30739a230aaSStefan Roese gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; 30839a230aaSStefan Roese }; 30939a230aaSStefan Roese 31039a230aaSStefan Roese reg_sata0: pwr-sata0 { 31139a230aaSStefan Roese compatible = "regulator-fixed"; 31239a230aaSStefan Roese regulator-name = "pwr_en_sata0"; 31339a230aaSStefan Roese enable-active-high; 31439a230aaSStefan Roese regulator-always-on; 31539a230aaSStefan Roese 31639a230aaSStefan Roese }; 31739a230aaSStefan Roese 31839a230aaSStefan Roese reg_5v_sata0: v5-sata0 { 31939a230aaSStefan Roese compatible = "regulator-fixed"; 32039a230aaSStefan Roese regulator-name = "v5.0-sata0"; 32139a230aaSStefan Roese regulator-min-microvolt = <5000000>; 32239a230aaSStefan Roese regulator-max-microvolt = <5000000>; 32339a230aaSStefan Roese regulator-always-on; 32439a230aaSStefan Roese vin-supply = <®_sata0>; 32539a230aaSStefan Roese }; 32639a230aaSStefan Roese 32739a230aaSStefan Roese reg_12v_sata0: v12-sata0 { 32839a230aaSStefan Roese compatible = "regulator-fixed"; 32939a230aaSStefan Roese regulator-name = "v12.0-sata0"; 33039a230aaSStefan Roese regulator-min-microvolt = <12000000>; 33139a230aaSStefan Roese regulator-max-microvolt = <12000000>; 33239a230aaSStefan Roese regulator-always-on; 33339a230aaSStefan Roese vin-supply = <®_sata0>; 33439a230aaSStefan Roese }; 33539a230aaSStefan Roese 33639a230aaSStefan Roese reg_sata1: pwr-sata1 { 33739a230aaSStefan Roese regulator-name = "pwr_en_sata1"; 33839a230aaSStefan Roese compatible = "regulator-fixed"; 33939a230aaSStefan Roese regulator-min-microvolt = <12000000>; 34039a230aaSStefan Roese regulator-max-microvolt = <12000000>; 34139a230aaSStefan Roese enable-active-high; 34239a230aaSStefan Roese regulator-always-on; 34339a230aaSStefan Roese gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; 34439a230aaSStefan Roese }; 34539a230aaSStefan Roese 34639a230aaSStefan Roese reg_5v_sata1: v5-sata1 { 34739a230aaSStefan Roese compatible = "regulator-fixed"; 34839a230aaSStefan Roese regulator-name = "v5.0-sata1"; 34939a230aaSStefan Roese regulator-min-microvolt = <5000000>; 35039a230aaSStefan Roese regulator-max-microvolt = <5000000>; 35139a230aaSStefan Roese regulator-always-on; 35239a230aaSStefan Roese vin-supply = <®_sata1>; 35339a230aaSStefan Roese }; 35439a230aaSStefan Roese 35539a230aaSStefan Roese reg_12v_sata1: v12-sata1 { 35639a230aaSStefan Roese compatible = "regulator-fixed"; 35739a230aaSStefan Roese regulator-name = "v12.0-sata1"; 35839a230aaSStefan Roese regulator-min-microvolt = <12000000>; 35939a230aaSStefan Roese regulator-max-microvolt = <12000000>; 36039a230aaSStefan Roese regulator-always-on; 36139a230aaSStefan Roese vin-supply = <®_sata1>; 36239a230aaSStefan Roese }; 36339a230aaSStefan Roese 36439a230aaSStefan Roese reg_sata2: pwr-sata2 { 36539a230aaSStefan Roese compatible = "regulator-fixed"; 36639a230aaSStefan Roese regulator-name = "pwr_en_sata2"; 36739a230aaSStefan Roese enable-active-high; 36839a230aaSStefan Roese regulator-always-on; 36939a230aaSStefan Roese gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; 37039a230aaSStefan Roese }; 37139a230aaSStefan Roese 37239a230aaSStefan Roese reg_5v_sata2: v5-sata2 { 37339a230aaSStefan Roese compatible = "regulator-fixed"; 37439a230aaSStefan Roese regulator-name = "v5.0-sata2"; 37539a230aaSStefan Roese regulator-min-microvolt = <5000000>; 37639a230aaSStefan Roese regulator-max-microvolt = <5000000>; 37739a230aaSStefan Roese regulator-always-on; 37839a230aaSStefan Roese vin-supply = <®_sata2>; 37939a230aaSStefan Roese }; 38039a230aaSStefan Roese 38139a230aaSStefan Roese reg_12v_sata2: v12-sata2 { 38239a230aaSStefan Roese compatible = "regulator-fixed"; 38339a230aaSStefan Roese regulator-name = "v12.0-sata2"; 38439a230aaSStefan Roese regulator-min-microvolt = <12000000>; 38539a230aaSStefan Roese regulator-max-microvolt = <12000000>; 38639a230aaSStefan Roese regulator-always-on; 38739a230aaSStefan Roese vin-supply = <®_sata2>; 38839a230aaSStefan Roese }; 38939a230aaSStefan Roese 39039a230aaSStefan Roese reg_sata3: pwr-sata3 { 39139a230aaSStefan Roese compatible = "regulator-fixed"; 39239a230aaSStefan Roese regulator-name = "pwr_en_sata3"; 39339a230aaSStefan Roese enable-active-high; 39439a230aaSStefan Roese regulator-always-on; 39539a230aaSStefan Roese gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; 39639a230aaSStefan Roese }; 39739a230aaSStefan Roese 39839a230aaSStefan Roese reg_5v_sata3: v5-sata3 { 39939a230aaSStefan Roese compatible = "regulator-fixed"; 40039a230aaSStefan Roese regulator-name = "v5.0-sata3"; 40139a230aaSStefan Roese regulator-min-microvolt = <5000000>; 40239a230aaSStefan Roese regulator-max-microvolt = <5000000>; 40339a230aaSStefan Roese regulator-always-on; 40439a230aaSStefan Roese vin-supply = <®_sata3>; 40539a230aaSStefan Roese }; 40639a230aaSStefan Roese 40739a230aaSStefan Roese reg_12v_sata3: v12-sata3 { 40839a230aaSStefan Roese compatible = "regulator-fixed"; 40939a230aaSStefan Roese regulator-name = "v12.0-sata3"; 41039a230aaSStefan Roese regulator-min-microvolt = <12000000>; 41139a230aaSStefan Roese regulator-max-microvolt = <12000000>; 41239a230aaSStefan Roese regulator-always-on; 41339a230aaSStefan Roese vin-supply = <®_sata3>; 41439a230aaSStefan Roese }; 41539a230aaSStefan Roese}; 41639a230aaSStefan Roese 41739a230aaSStefan Roese&pinctrl { 41839a230aaSStefan Roese pca0_pins: pca0_pins { 41939a230aaSStefan Roese marvell,pins = "mpp18"; 42039a230aaSStefan Roese marvell,function = "gpio"; 42139a230aaSStefan Roese }; 42239a230aaSStefan Roese}; 423