1*73ec6960SLokesh Vutla/* 2*73ec6960SLokesh Vutla * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3*73ec6960SLokesh Vutla * 4*73ec6960SLokesh Vutla * This program is free software; you can redistribute it and/or modify 5*73ec6960SLokesh Vutla * it under the terms of the GNU General Public License version 2 as 6*73ec6960SLokesh Vutla * published by the Free Software Foundation. 7*73ec6960SLokesh Vutla */ 8*73ec6960SLokesh Vutla 9*73ec6960SLokesh Vutla/* 10*73ec6960SLokesh Vutla * AM335x ICE V2 board 11*73ec6960SLokesh Vutla * http://www.ti.com/tool/tmdsice3359 12*73ec6960SLokesh Vutla */ 13*73ec6960SLokesh Vutla 14*73ec6960SLokesh Vutla/dts-v1/; 15*73ec6960SLokesh Vutla 16*73ec6960SLokesh Vutla#include "am33xx.dtsi" 17*73ec6960SLokesh Vutla 18*73ec6960SLokesh Vutla/ { 19*73ec6960SLokesh Vutla model = "TI AM3359 ICE-V2"; 20*73ec6960SLokesh Vutla compatible = "ti,am3359-icev2", "ti,am33xx"; 21*73ec6960SLokesh Vutla 22*73ec6960SLokesh Vutla chosen { 23*73ec6960SLokesh Vutla stdout-path = &uart3; 24*73ec6960SLokesh Vutla tick-timer = &timer2; 25*73ec6960SLokesh Vutla }; 26*73ec6960SLokesh Vutla 27*73ec6960SLokesh Vutla memory { 28*73ec6960SLokesh Vutla device_type = "memory"; 29*73ec6960SLokesh Vutla reg = <0x80000000 0x10000000>; /* 256 MB */ 30*73ec6960SLokesh Vutla }; 31*73ec6960SLokesh Vutla 32*73ec6960SLokesh Vutla vbat: fixedregulator@0 { 33*73ec6960SLokesh Vutla compatible = "regulator-fixed"; 34*73ec6960SLokesh Vutla regulator-name = "vbat"; 35*73ec6960SLokesh Vutla regulator-min-microvolt = <5000000>; 36*73ec6960SLokesh Vutla regulator-max-microvolt = <5000000>; 37*73ec6960SLokesh Vutla regulator-boot-on; 38*73ec6960SLokesh Vutla }; 39*73ec6960SLokesh Vutla 40*73ec6960SLokesh Vutla vtt_fixed: fixedregulator@1 { 41*73ec6960SLokesh Vutla compatible = "regulator-fixed"; 42*73ec6960SLokesh Vutla regulator-name = "vtt"; 43*73ec6960SLokesh Vutla regulator-min-microvolt = <1500000>; 44*73ec6960SLokesh Vutla regulator-max-microvolt = <1500000>; 45*73ec6960SLokesh Vutla gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>; 46*73ec6960SLokesh Vutla regulator-always-on; 47*73ec6960SLokesh Vutla regulator-boot-on; 48*73ec6960SLokesh Vutla enable-active-high; 49*73ec6960SLokesh Vutla }; 50*73ec6960SLokesh Vutla 51*73ec6960SLokesh Vutla leds@0 { 52*73ec6960SLokesh Vutla compatible = "gpio-leds"; 53*73ec6960SLokesh Vutla 54*73ec6960SLokesh Vutla led@0 { 55*73ec6960SLokesh Vutla label = "out0"; 56*73ec6960SLokesh Vutla gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 57*73ec6960SLokesh Vutla default-state = "off"; 58*73ec6960SLokesh Vutla }; 59*73ec6960SLokesh Vutla 60*73ec6960SLokesh Vutla led@1 { 61*73ec6960SLokesh Vutla label = "out1"; 62*73ec6960SLokesh Vutla gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>; 63*73ec6960SLokesh Vutla default-state = "off"; 64*73ec6960SLokesh Vutla }; 65*73ec6960SLokesh Vutla 66*73ec6960SLokesh Vutla led@2 { 67*73ec6960SLokesh Vutla label = "out2"; 68*73ec6960SLokesh Vutla gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>; 69*73ec6960SLokesh Vutla default-state = "off"; 70*73ec6960SLokesh Vutla }; 71*73ec6960SLokesh Vutla 72*73ec6960SLokesh Vutla led@3 { 73*73ec6960SLokesh Vutla label = "out3"; 74*73ec6960SLokesh Vutla gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>; 75*73ec6960SLokesh Vutla default-state = "off"; 76*73ec6960SLokesh Vutla }; 77*73ec6960SLokesh Vutla 78*73ec6960SLokesh Vutla led@4 { 79*73ec6960SLokesh Vutla label = "out4"; 80*73ec6960SLokesh Vutla gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>; 81*73ec6960SLokesh Vutla default-state = "off"; 82*73ec6960SLokesh Vutla }; 83*73ec6960SLokesh Vutla 84*73ec6960SLokesh Vutla led@5 { 85*73ec6960SLokesh Vutla label = "out5"; 86*73ec6960SLokesh Vutla gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>; 87*73ec6960SLokesh Vutla default-state = "off"; 88*73ec6960SLokesh Vutla }; 89*73ec6960SLokesh Vutla 90*73ec6960SLokesh Vutla led@6 { 91*73ec6960SLokesh Vutla label = "out6"; 92*73ec6960SLokesh Vutla gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>; 93*73ec6960SLokesh Vutla default-state = "off"; 94*73ec6960SLokesh Vutla }; 95*73ec6960SLokesh Vutla 96*73ec6960SLokesh Vutla led@7 { 97*73ec6960SLokesh Vutla label = "out7"; 98*73ec6960SLokesh Vutla gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>; 99*73ec6960SLokesh Vutla default-state = "off"; 100*73ec6960SLokesh Vutla }; 101*73ec6960SLokesh Vutla }; 102*73ec6960SLokesh Vutla 103*73ec6960SLokesh Vutla /* Tricolor status LEDs */ 104*73ec6960SLokesh Vutla leds@1 { 105*73ec6960SLokesh Vutla compatible = "gpio-leds"; 106*73ec6960SLokesh Vutla pinctrl-names = "default"; 107*73ec6960SLokesh Vutla pinctrl-0 = <&user_leds>; 108*73ec6960SLokesh Vutla 109*73ec6960SLokesh Vutla led@0 { 110*73ec6960SLokesh Vutla label = "status0:red:cpu0"; 111*73ec6960SLokesh Vutla gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>; 112*73ec6960SLokesh Vutla default-state = "off"; 113*73ec6960SLokesh Vutla linux,default-trigger = "cpu0"; 114*73ec6960SLokesh Vutla }; 115*73ec6960SLokesh Vutla 116*73ec6960SLokesh Vutla led@1 { 117*73ec6960SLokesh Vutla label = "status0:green:usr"; 118*73ec6960SLokesh Vutla gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; 119*73ec6960SLokesh Vutla default-state = "off"; 120*73ec6960SLokesh Vutla }; 121*73ec6960SLokesh Vutla 122*73ec6960SLokesh Vutla led@2 { 123*73ec6960SLokesh Vutla label = "status0:yellow:usr"; 124*73ec6960SLokesh Vutla gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; 125*73ec6960SLokesh Vutla default-state = "off"; 126*73ec6960SLokesh Vutla }; 127*73ec6960SLokesh Vutla 128*73ec6960SLokesh Vutla led@3 { 129*73ec6960SLokesh Vutla label = "status1:red:mmc0"; 130*73ec6960SLokesh Vutla gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; 131*73ec6960SLokesh Vutla default-state = "off"; 132*73ec6960SLokesh Vutla linux,default-trigger = "mmc0"; 133*73ec6960SLokesh Vutla }; 134*73ec6960SLokesh Vutla 135*73ec6960SLokesh Vutla led@4 { 136*73ec6960SLokesh Vutla label = "status1:green:usr"; 137*73ec6960SLokesh Vutla gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 138*73ec6960SLokesh Vutla default-state = "off"; 139*73ec6960SLokesh Vutla }; 140*73ec6960SLokesh Vutla 141*73ec6960SLokesh Vutla led@5 { 142*73ec6960SLokesh Vutla label = "status1:yellow:usr"; 143*73ec6960SLokesh Vutla gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; 144*73ec6960SLokesh Vutla default-state = "off"; 145*73ec6960SLokesh Vutla }; 146*73ec6960SLokesh Vutla }; 147*73ec6960SLokesh Vutla}; 148*73ec6960SLokesh Vutla 149*73ec6960SLokesh Vutla&am33xx_pinmux { 150*73ec6960SLokesh Vutla user_leds: user_leds { 151*73ec6960SLokesh Vutla pinctrl-single,pins = < 152*73ec6960SLokesh Vutla AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */ 153*73ec6960SLokesh Vutla AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */ 154*73ec6960SLokesh Vutla AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */ 155*73ec6960SLokesh Vutla AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */ 156*73ec6960SLokesh Vutla AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */ 157*73ec6960SLokesh Vutla AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */ 158*73ec6960SLokesh Vutla >; 159*73ec6960SLokesh Vutla }; 160*73ec6960SLokesh Vutla 161*73ec6960SLokesh Vutla mmc0_pins_default: mmc0_pins_default { 162*73ec6960SLokesh Vutla pinctrl-single,pins = < 163*73ec6960SLokesh Vutla AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */ 164*73ec6960SLokesh Vutla AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */ 165*73ec6960SLokesh Vutla AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */ 166*73ec6960SLokesh Vutla AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */ 167*73ec6960SLokesh Vutla AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */ 168*73ec6960SLokesh Vutla AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */ 169*73ec6960SLokesh Vutla AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */ 170*73ec6960SLokesh Vutla >; 171*73ec6960SLokesh Vutla }; 172*73ec6960SLokesh Vutla 173*73ec6960SLokesh Vutla i2c0_pins_default: i2c0_pins_default { 174*73ec6960SLokesh Vutla pinctrl-single,pins = < 175*73ec6960SLokesh Vutla AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */ 176*73ec6960SLokesh Vutla AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */ 177*73ec6960SLokesh Vutla >; 178*73ec6960SLokesh Vutla }; 179*73ec6960SLokesh Vutla 180*73ec6960SLokesh Vutla spi0_pins_default: spi0_pins_default { 181*73ec6960SLokesh Vutla pinctrl-single,pins = < 182*73ec6960SLokesh Vutla AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */ 183*73ec6960SLokesh Vutla AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */ 184*73ec6960SLokesh Vutla AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */ 185*73ec6960SLokesh Vutla AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */ 186*73ec6960SLokesh Vutla >; 187*73ec6960SLokesh Vutla }; 188*73ec6960SLokesh Vutla 189*73ec6960SLokesh Vutla uart3_pins_default: uart3_pins_default { 190*73ec6960SLokesh Vutla pinctrl-single,pins = < 191*73ec6960SLokesh Vutla AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */ 192*73ec6960SLokesh Vutla AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */ 193*73ec6960SLokesh Vutla >; 194*73ec6960SLokesh Vutla }; 195*73ec6960SLokesh Vutla 196*73ec6960SLokesh Vutla cpsw_default: cpsw_default { 197*73ec6960SLokesh Vutla pinctrl-single,pins = < 198*73ec6960SLokesh Vutla /* Slave 1, RMII mode */ 199*73ec6960SLokesh Vutla AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */ 200*73ec6960SLokesh Vutla AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */ 201*73ec6960SLokesh Vutla AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */ 202*73ec6960SLokesh Vutla AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */ 203*73ec6960SLokesh Vutla AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */ 204*73ec6960SLokesh Vutla AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */ 205*73ec6960SLokesh Vutla AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */ 206*73ec6960SLokesh Vutla AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */ 207*73ec6960SLokesh Vutla /* Slave 2, RMII mode */ 208*73ec6960SLokesh Vutla AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */ 209*73ec6960SLokesh Vutla AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */ 210*73ec6960SLokesh Vutla AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */ 211*73ec6960SLokesh Vutla AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */ 212*73ec6960SLokesh Vutla AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */ 213*73ec6960SLokesh Vutla AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */ 214*73ec6960SLokesh Vutla AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */ 215*73ec6960SLokesh Vutla AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */ 216*73ec6960SLokesh Vutla >; 217*73ec6960SLokesh Vutla }; 218*73ec6960SLokesh Vutla 219*73ec6960SLokesh Vutla cpsw_sleep: cpsw_sleep { 220*73ec6960SLokesh Vutla pinctrl-single,pins = < 221*73ec6960SLokesh Vutla /* Slave 1 reset value */ 222*73ec6960SLokesh Vutla AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 223*73ec6960SLokesh Vutla AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 224*73ec6960SLokesh Vutla AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 225*73ec6960SLokesh Vutla AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 226*73ec6960SLokesh Vutla AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 227*73ec6960SLokesh Vutla AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 228*73ec6960SLokesh Vutla AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 229*73ec6960SLokesh Vutla AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 230*73ec6960SLokesh Vutla 231*73ec6960SLokesh Vutla /* Slave 2 reset value */ 232*73ec6960SLokesh Vutla AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 233*73ec6960SLokesh Vutla AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 234*73ec6960SLokesh Vutla AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 235*73ec6960SLokesh Vutla AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 236*73ec6960SLokesh Vutla AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 237*73ec6960SLokesh Vutla AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 238*73ec6960SLokesh Vutla AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 239*73ec6960SLokesh Vutla AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 240*73ec6960SLokesh Vutla >; 241*73ec6960SLokesh Vutla }; 242*73ec6960SLokesh Vutla 243*73ec6960SLokesh Vutla davinci_mdio_default: davinci_mdio_default { 244*73ec6960SLokesh Vutla pinctrl-single,pins = < 245*73ec6960SLokesh Vutla /* MDIO */ 246*73ec6960SLokesh Vutla AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */ 247*73ec6960SLokesh Vutla AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */ 248*73ec6960SLokesh Vutla >; 249*73ec6960SLokesh Vutla }; 250*73ec6960SLokesh Vutla 251*73ec6960SLokesh Vutla davinci_mdio_sleep: davinci_mdio_sleep { 252*73ec6960SLokesh Vutla pinctrl-single,pins = < 253*73ec6960SLokesh Vutla /* MDIO reset value */ 254*73ec6960SLokesh Vutla AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 255*73ec6960SLokesh Vutla AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7)) 256*73ec6960SLokesh Vutla >; 257*73ec6960SLokesh Vutla }; 258*73ec6960SLokesh Vutla}; 259*73ec6960SLokesh Vutla 260*73ec6960SLokesh Vutla&i2c0 { 261*73ec6960SLokesh Vutla pinctrl-names = "default"; 262*73ec6960SLokesh Vutla pinctrl-0 = <&i2c0_pins_default>; 263*73ec6960SLokesh Vutla 264*73ec6960SLokesh Vutla status = "okay"; 265*73ec6960SLokesh Vutla clock-frequency = <400000>; 266*73ec6960SLokesh Vutla 267*73ec6960SLokesh Vutla tps: power-controller@2d { 268*73ec6960SLokesh Vutla reg = <0x2d>; 269*73ec6960SLokesh Vutla }; 270*73ec6960SLokesh Vutla 271*73ec6960SLokesh Vutla tpic2810: gpio@60 { 272*73ec6960SLokesh Vutla compatible = "ti,tpic2810"; 273*73ec6960SLokesh Vutla reg = <0x60>; 274*73ec6960SLokesh Vutla gpio-controller; 275*73ec6960SLokesh Vutla #gpio-cells = <2>; 276*73ec6960SLokesh Vutla }; 277*73ec6960SLokesh Vutla}; 278*73ec6960SLokesh Vutla 279*73ec6960SLokesh Vutla#include "tps65910.dtsi" 280*73ec6960SLokesh Vutla 281*73ec6960SLokesh Vutla&tps { 282*73ec6960SLokesh Vutla vcc1-supply = <&vbat>; 283*73ec6960SLokesh Vutla vcc2-supply = <&vbat>; 284*73ec6960SLokesh Vutla vcc3-supply = <&vbat>; 285*73ec6960SLokesh Vutla vcc4-supply = <&vbat>; 286*73ec6960SLokesh Vutla vcc5-supply = <&vbat>; 287*73ec6960SLokesh Vutla vcc6-supply = <&vbat>; 288*73ec6960SLokesh Vutla vcc7-supply = <&vbat>; 289*73ec6960SLokesh Vutla vccio-supply = <&vbat>; 290*73ec6960SLokesh Vutla 291*73ec6960SLokesh Vutla regulators { 292*73ec6960SLokesh Vutla vrtc_reg: regulator@0 { 293*73ec6960SLokesh Vutla regulator-always-on; 294*73ec6960SLokesh Vutla }; 295*73ec6960SLokesh Vutla 296*73ec6960SLokesh Vutla vio_reg: regulator@1 { 297*73ec6960SLokesh Vutla regulator-always-on; 298*73ec6960SLokesh Vutla }; 299*73ec6960SLokesh Vutla 300*73ec6960SLokesh Vutla vdd1_reg: regulator@2 { 301*73ec6960SLokesh Vutla regulator-name = "vdd_mpu"; 302*73ec6960SLokesh Vutla regulator-min-microvolt = <912500>; 303*73ec6960SLokesh Vutla regulator-max-microvolt = <1326000>; 304*73ec6960SLokesh Vutla regulator-boot-on; 305*73ec6960SLokesh Vutla regulator-always-on; 306*73ec6960SLokesh Vutla }; 307*73ec6960SLokesh Vutla 308*73ec6960SLokesh Vutla vdd2_reg: regulator@3 { 309*73ec6960SLokesh Vutla regulator-name = "vdd_core"; 310*73ec6960SLokesh Vutla regulator-min-microvolt = <912500>; 311*73ec6960SLokesh Vutla regulator-max-microvolt = <1144000>; 312*73ec6960SLokesh Vutla regulator-boot-on; 313*73ec6960SLokesh Vutla regulator-always-on; 314*73ec6960SLokesh Vutla }; 315*73ec6960SLokesh Vutla 316*73ec6960SLokesh Vutla vdd3_reg: regulator@4 { 317*73ec6960SLokesh Vutla regulator-always-on; 318*73ec6960SLokesh Vutla }; 319*73ec6960SLokesh Vutla 320*73ec6960SLokesh Vutla vdig1_reg: regulator@5 { 321*73ec6960SLokesh Vutla regulator-always-on; 322*73ec6960SLokesh Vutla }; 323*73ec6960SLokesh Vutla 324*73ec6960SLokesh Vutla vdig2_reg: regulator@6 { 325*73ec6960SLokesh Vutla regulator-always-on; 326*73ec6960SLokesh Vutla }; 327*73ec6960SLokesh Vutla 328*73ec6960SLokesh Vutla vpll_reg: regulator@7 { 329*73ec6960SLokesh Vutla regulator-always-on; 330*73ec6960SLokesh Vutla }; 331*73ec6960SLokesh Vutla 332*73ec6960SLokesh Vutla vdac_reg: regulator@8 { 333*73ec6960SLokesh Vutla regulator-always-on; 334*73ec6960SLokesh Vutla }; 335*73ec6960SLokesh Vutla 336*73ec6960SLokesh Vutla vaux1_reg: regulator@9 { 337*73ec6960SLokesh Vutla regulator-always-on; 338*73ec6960SLokesh Vutla }; 339*73ec6960SLokesh Vutla 340*73ec6960SLokesh Vutla vaux2_reg: regulator@10 { 341*73ec6960SLokesh Vutla regulator-always-on; 342*73ec6960SLokesh Vutla }; 343*73ec6960SLokesh Vutla 344*73ec6960SLokesh Vutla vaux33_reg: regulator@11 { 345*73ec6960SLokesh Vutla regulator-always-on; 346*73ec6960SLokesh Vutla }; 347*73ec6960SLokesh Vutla 348*73ec6960SLokesh Vutla vmmc_reg: regulator@12 { 349*73ec6960SLokesh Vutla regulator-min-microvolt = <1800000>; 350*73ec6960SLokesh Vutla regulator-max-microvolt = <3300000>; 351*73ec6960SLokesh Vutla regulator-always-on; 352*73ec6960SLokesh Vutla }; 353*73ec6960SLokesh Vutla }; 354*73ec6960SLokesh Vutla}; 355*73ec6960SLokesh Vutla 356*73ec6960SLokesh Vutla&mmc1 { 357*73ec6960SLokesh Vutla status = "okay"; 358*73ec6960SLokesh Vutla vmmc-supply = <&vmmc_reg>; 359*73ec6960SLokesh Vutla bus-width = <4>; 360*73ec6960SLokesh Vutla pinctrl-names = "default"; 361*73ec6960SLokesh Vutla pinctrl-0 = <&mmc0_pins_default>; 362*73ec6960SLokesh Vutla}; 363*73ec6960SLokesh Vutla 364*73ec6960SLokesh Vutla&gpio0 { 365*73ec6960SLokesh Vutla /* Do not idle the GPIO used for holding the VTT regulator */ 366*73ec6960SLokesh Vutla ti,no-reset-on-init; 367*73ec6960SLokesh Vutla ti,no-idle-on-init; 368*73ec6960SLokesh Vutla 369*73ec6960SLokesh Vutla p7 { 370*73ec6960SLokesh Vutla gpio-hog; 371*73ec6960SLokesh Vutla gpios = <7 GPIO_ACTIVE_HIGH>; 372*73ec6960SLokesh Vutla output-high; 373*73ec6960SLokesh Vutla line-name = "FET_SWITCH_CTRL"; 374*73ec6960SLokesh Vutla }; 375*73ec6960SLokesh Vutla}; 376*73ec6960SLokesh Vutla 377*73ec6960SLokesh Vutla&uart3 { 378*73ec6960SLokesh Vutla pinctrl-names = "default"; 379*73ec6960SLokesh Vutla pinctrl-0 = <&uart3_pins_default>; 380*73ec6960SLokesh Vutla status = "okay"; 381*73ec6960SLokesh Vutla}; 382*73ec6960SLokesh Vutla 383*73ec6960SLokesh Vutla&gpio3 { 384*73ec6960SLokesh Vutla p4 { 385*73ec6960SLokesh Vutla gpio-hog; 386*73ec6960SLokesh Vutla gpios = <4 GPIO_ACTIVE_HIGH>; 387*73ec6960SLokesh Vutla output-high; 388*73ec6960SLokesh Vutla line-name = "PR1_MII_CTRL"; 389*73ec6960SLokesh Vutla }; 390*73ec6960SLokesh Vutla 391*73ec6960SLokesh Vutla p10 { 392*73ec6960SLokesh Vutla gpio-hog; 393*73ec6960SLokesh Vutla gpios = <10 GPIO_ACTIVE_HIGH>; 394*73ec6960SLokesh Vutla output-high; 395*73ec6960SLokesh Vutla line-name = "MUX_MII_CTRL"; 396*73ec6960SLokesh Vutla }; 397*73ec6960SLokesh Vutla}; 398*73ec6960SLokesh Vutla 399*73ec6960SLokesh Vutla&cpsw_emac0 { 400*73ec6960SLokesh Vutla phy_id = <&davinci_mdio>, <1>; 401*73ec6960SLokesh Vutla phy-mode = "rmii"; 402*73ec6960SLokesh Vutla dual_emac_res_vlan = <1>; 403*73ec6960SLokesh Vutla}; 404*73ec6960SLokesh Vutla 405*73ec6960SLokesh Vutla&cpsw_emac1 { 406*73ec6960SLokesh Vutla phy_id = <&davinci_mdio>, <3>; 407*73ec6960SLokesh Vutla phy-mode = "rmii"; 408*73ec6960SLokesh Vutla dual_emac_res_vlan = <2>; 409*73ec6960SLokesh Vutla}; 410*73ec6960SLokesh Vutla 411*73ec6960SLokesh Vutla&mac { 412*73ec6960SLokesh Vutla pinctrl-names = "default", "sleep"; 413*73ec6960SLokesh Vutla pinctrl-0 = <&cpsw_default>; 414*73ec6960SLokesh Vutla pinctrl-1 = <&cpsw_sleep>; 415*73ec6960SLokesh Vutla status = "okay"; 416*73ec6960SLokesh Vutla dual_emac; 417*73ec6960SLokesh Vutla}; 418*73ec6960SLokesh Vutla 419*73ec6960SLokesh Vutla&phy_sel { 420*73ec6960SLokesh Vutla rmii-clock-ext; 421*73ec6960SLokesh Vutla}; 422*73ec6960SLokesh Vutla 423*73ec6960SLokesh Vutla&davinci_mdio { 424*73ec6960SLokesh Vutla pinctrl-names = "default", "sleep"; 425*73ec6960SLokesh Vutla pinctrl-0 = <&davinci_mdio_default>; 426*73ec6960SLokesh Vutla pinctrl-1 = <&davinci_mdio_sleep>; 427*73ec6960SLokesh Vutla status = "okay"; 428*73ec6960SLokesh Vutla reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; 429*73ec6960SLokesh Vutla reset-delay-us = <2>; /* PHY datasheet states 1uS min */ 430*73ec6960SLokesh Vutla}; 431