15cc16cbfSSimon Glass/* 25cc16cbfSSimon Glass * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 35cc16cbfSSimon Glass * 45cc16cbfSSimon Glass * This program is free software; you can redistribute it and/or modify 55cc16cbfSSimon Glass * it under the terms of the GNU General Public License version 2 as 65cc16cbfSSimon Glass * published by the Free Software Foundation. 75cc16cbfSSimon Glass */ 85cc16cbfSSimon Glass/dts-v1/; 95cc16cbfSSimon Glass 105cc16cbfSSimon Glass#include "am33xx.dtsi" 115cc16cbfSSimon Glass#include "am335x-bone-common.dtsi" 125cc16cbfSSimon Glass 131480fdf8STom Rini/ { 141480fdf8STom Rini model = "TI AM335x BeagleBone Black"; 151480fdf8STom Rini compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; 161480fdf8STom Rini chosen { 171480fdf8STom Rini stdout-path = &uart0; 18*c7bd8704SMugunthan V N tick-timer = &timer2; 191480fdf8STom Rini }; 201480fdf8STom Rini}; 211480fdf8STom Rini 225cc16cbfSSimon Glass&ldo3_reg { 235cc16cbfSSimon Glass regulator-min-microvolt = <1800000>; 245cc16cbfSSimon Glass regulator-max-microvolt = <1800000>; 255cc16cbfSSimon Glass regulator-always-on; 265cc16cbfSSimon Glass}; 271480fdf8STom Rini 281480fdf8STom Rini&mmc1 { 291480fdf8STom Rini vmmc-supply = <&vmmcsd_fixed>; 301480fdf8STom Rini}; 311480fdf8STom Rini 321480fdf8STom Rini&mmc2 { 331480fdf8STom Rini vmmc-supply = <&vmmcsd_fixed>; 341480fdf8STom Rini pinctrl-names = "default"; 351480fdf8STom Rini pinctrl-0 = <&emmc_pins>; 361480fdf8STom Rini bus-width = <8>; 371480fdf8STom Rini status = "okay"; 381480fdf8STom Rini}; 391480fdf8STom Rini 401480fdf8STom Rini&am33xx_pinmux { 411480fdf8STom Rini nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins { 421480fdf8STom Rini pinctrl-single,pins = < 431480fdf8STom Rini 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ 441480fdf8STom Rini 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 451480fdf8STom Rini 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 461480fdf8STom Rini 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 471480fdf8STom Rini 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 481480fdf8STom Rini 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 491480fdf8STom Rini 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 501480fdf8STom Rini 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 511480fdf8STom Rini 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 521480fdf8STom Rini 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 531480fdf8STom Rini 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 541480fdf8STom Rini 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 551480fdf8STom Rini 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 561480fdf8STom Rini 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 571480fdf8STom Rini 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 581480fdf8STom Rini 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 591480fdf8STom Rini 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ 601480fdf8STom Rini 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 611480fdf8STom Rini 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 621480fdf8STom Rini 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 631480fdf8STom Rini 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ 641480fdf8STom Rini >; 651480fdf8STom Rini }; 661480fdf8STom Rini nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins { 671480fdf8STom Rini pinctrl-single,pins = < 681480fdf8STom Rini 0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */ 691480fdf8STom Rini >; 701480fdf8STom Rini }; 711480fdf8STom Rini}; 721480fdf8STom Rini 731480fdf8STom Rini&lcdc { 741480fdf8STom Rini status = "okay"; 751480fdf8STom Rini}; 761480fdf8STom Rini 771480fdf8STom Rini/ { 781480fdf8STom Rini hdmi { 791480fdf8STom Rini compatible = "ti,tilcdc,slave"; 801480fdf8STom Rini i2c = <&i2c0>; 811480fdf8STom Rini pinctrl-names = "default", "off"; 821480fdf8STom Rini pinctrl-0 = <&nxp_hdmi_bonelt_pins>; 831480fdf8STom Rini pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; 841480fdf8STom Rini status = "okay"; 851480fdf8STom Rini }; 861480fdf8STom Rini}; 871480fdf8STom Rini 881480fdf8STom Rini&rtc { 891480fdf8STom Rini system-power-controller; 901480fdf8STom Rini}; 91