xref: /openbmc/u-boot/arch/arm/dts/am335x-bone-common.dtsi (revision 1480fdf8a6dad28de70ade72974db436f7967525)
15cc16cbfSSimon Glass/*
25cc16cbfSSimon Glass * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
35cc16cbfSSimon Glass *
45cc16cbfSSimon Glass * This program is free software; you can redistribute it and/or modify
55cc16cbfSSimon Glass * it under the terms of the GNU General Public License version 2 as
65cc16cbfSSimon Glass * published by the Free Software Foundation.
75cc16cbfSSimon Glass */
85cc16cbfSSimon Glass
95cc16cbfSSimon Glass/ {
105cc16cbfSSimon Glass	cpus {
115cc16cbfSSimon Glass		cpu@0 {
125cc16cbfSSimon Glass			cpu0-supply = <&dcdc2_reg>;
135cc16cbfSSimon Glass		};
145cc16cbfSSimon Glass	};
155cc16cbfSSimon Glass
165cc16cbfSSimon Glass	memory {
175cc16cbfSSimon Glass		device_type = "memory";
185cc16cbfSSimon Glass		reg = <0x80000000 0x10000000>; /* 256 MB */
195cc16cbfSSimon Glass	};
205cc16cbfSSimon Glass
21*1480fdf8STom Rini	leds {
22*1480fdf8STom Rini		pinctrl-names = "default";
23*1480fdf8STom Rini		pinctrl-0 = <&user_leds_s0>;
24*1480fdf8STom Rini
25*1480fdf8STom Rini		compatible = "gpio-leds";
26*1480fdf8STom Rini
27*1480fdf8STom Rini		led@2 {
28*1480fdf8STom Rini			label = "beaglebone:green:heartbeat";
29*1480fdf8STom Rini			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
30*1480fdf8STom Rini			linux,default-trigger = "heartbeat";
31*1480fdf8STom Rini			default-state = "off";
32*1480fdf8STom Rini		};
33*1480fdf8STom Rini
34*1480fdf8STom Rini		led@3 {
35*1480fdf8STom Rini			label = "beaglebone:green:mmc0";
36*1480fdf8STom Rini			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
37*1480fdf8STom Rini			linux,default-trigger = "mmc0";
38*1480fdf8STom Rini			default-state = "off";
39*1480fdf8STom Rini		};
40*1480fdf8STom Rini
41*1480fdf8STom Rini		led@4 {
42*1480fdf8STom Rini			label = "beaglebone:green:usr2";
43*1480fdf8STom Rini			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
44*1480fdf8STom Rini			linux,default-trigger = "cpu0";
45*1480fdf8STom Rini			default-state = "off";
46*1480fdf8STom Rini		};
47*1480fdf8STom Rini
48*1480fdf8STom Rini		led@5 {
49*1480fdf8STom Rini			label = "beaglebone:green:usr3";
50*1480fdf8STom Rini			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
51*1480fdf8STom Rini			linux,default-trigger = "mmc1";
52*1480fdf8STom Rini			default-state = "off";
53*1480fdf8STom Rini		};
54*1480fdf8STom Rini	};
55*1480fdf8STom Rini
56*1480fdf8STom Rini	vmmcsd_fixed: fixedregulator@0 {
57*1480fdf8STom Rini		compatible = "regulator-fixed";
58*1480fdf8STom Rini		regulator-name = "vmmcsd_fixed";
59*1480fdf8STom Rini		regulator-min-microvolt = <3300000>;
60*1480fdf8STom Rini		regulator-max-microvolt = <3300000>;
61*1480fdf8STom Rini	};
62*1480fdf8STom Rini};
63*1480fdf8STom Rini
64*1480fdf8STom Rini&am33xx_pinmux {
655cc16cbfSSimon Glass	pinctrl-names = "default";
665cc16cbfSSimon Glass	pinctrl-0 = <&clkout2_pin>;
675cc16cbfSSimon Glass
685cc16cbfSSimon Glass	user_leds_s0: user_leds_s0 {
695cc16cbfSSimon Glass		pinctrl-single,pins = <
705cc16cbfSSimon Glass			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
715cc16cbfSSimon Glass			0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
725cc16cbfSSimon Glass			0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a7.gpio1_23 */
735cc16cbfSSimon Glass			0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a8.gpio1_24 */
745cc16cbfSSimon Glass		>;
755cc16cbfSSimon Glass	};
765cc16cbfSSimon Glass
775cc16cbfSSimon Glass	i2c0_pins: pinmux_i2c0_pins {
785cc16cbfSSimon Glass		pinctrl-single,pins = <
795cc16cbfSSimon Glass			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
805cc16cbfSSimon Glass			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
815cc16cbfSSimon Glass		>;
825cc16cbfSSimon Glass	};
835cc16cbfSSimon Glass
84*1480fdf8STom Rini	i2c2_pins: pinmux_i2c2_pins {
85*1480fdf8STom Rini		pinctrl-single,pins = <
86*1480fdf8STom Rini			0x178 (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */
87*1480fdf8STom Rini			0x17c (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.i2c2_scl */
88*1480fdf8STom Rini		>;
89*1480fdf8STom Rini	};
90*1480fdf8STom Rini
915cc16cbfSSimon Glass	uart0_pins: pinmux_uart0_pins {
925cc16cbfSSimon Glass		pinctrl-single,pins = <
935cc16cbfSSimon Glass			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
945cc16cbfSSimon Glass			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
955cc16cbfSSimon Glass		>;
965cc16cbfSSimon Glass	};
975cc16cbfSSimon Glass
985cc16cbfSSimon Glass	clkout2_pin: pinmux_clkout2_pin {
995cc16cbfSSimon Glass		pinctrl-single,pins = <
1005cc16cbfSSimon Glass			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
1015cc16cbfSSimon Glass		>;
1025cc16cbfSSimon Glass	};
1035cc16cbfSSimon Glass
1045cc16cbfSSimon Glass	cpsw_default: cpsw_default {
1055cc16cbfSSimon Glass		pinctrl-single,pins = <
1065cc16cbfSSimon Glass			/* Slave 1 */
1075cc16cbfSSimon Glass			0x110 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxerr.mii1_rxerr */
1085cc16cbfSSimon Glass			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txen.mii1_txen */
1095cc16cbfSSimon Glass			0x118 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxdv.mii1_rxdv */
1105cc16cbfSSimon Glass			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd3.mii1_txd3 */
1115cc16cbfSSimon Glass			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd2.mii1_txd2 */
1125cc16cbfSSimon Glass			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd1.mii1_txd1 */
1135cc16cbfSSimon Glass			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd0.mii1_txd0 */
1145cc16cbfSSimon Glass			0x12c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_txclk.mii1_txclk */
1155cc16cbfSSimon Glass			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxclk.mii1_rxclk */
1165cc16cbfSSimon Glass			0x134 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd3.mii1_rxd3 */
1175cc16cbfSSimon Glass			0x138 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd2.mii1_rxd2 */
1185cc16cbfSSimon Glass			0x13c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd1.mii1_rxd1 */
1195cc16cbfSSimon Glass			0x140 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd0.mii1_rxd0 */
1205cc16cbfSSimon Glass		>;
1215cc16cbfSSimon Glass	};
1225cc16cbfSSimon Glass
1235cc16cbfSSimon Glass	cpsw_sleep: cpsw_sleep {
1245cc16cbfSSimon Glass		pinctrl-single,pins = <
1255cc16cbfSSimon Glass			/* Slave 1 reset value */
1265cc16cbfSSimon Glass			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1275cc16cbfSSimon Glass			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1285cc16cbfSSimon Glass			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1295cc16cbfSSimon Glass			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
1305cc16cbfSSimon Glass			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1315cc16cbfSSimon Glass			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1325cc16cbfSSimon Glass			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1335cc16cbfSSimon Glass			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
1345cc16cbfSSimon Glass			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1355cc16cbfSSimon Glass			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1365cc16cbfSSimon Glass			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1375cc16cbfSSimon Glass			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
1385cc16cbfSSimon Glass			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1395cc16cbfSSimon Glass		>;
1405cc16cbfSSimon Glass	};
1415cc16cbfSSimon Glass
1425cc16cbfSSimon Glass	davinci_mdio_default: davinci_mdio_default {
1435cc16cbfSSimon Glass		pinctrl-single,pins = <
1445cc16cbfSSimon Glass			/* MDIO */
1455cc16cbfSSimon Glass			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
1465cc16cbfSSimon Glass			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
1475cc16cbfSSimon Glass		>;
1485cc16cbfSSimon Glass	};
1495cc16cbfSSimon Glass
1505cc16cbfSSimon Glass	davinci_mdio_sleep: davinci_mdio_sleep {
1515cc16cbfSSimon Glass		pinctrl-single,pins = <
1525cc16cbfSSimon Glass			/* MDIO reset value */
1535cc16cbfSSimon Glass			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
1545cc16cbfSSimon Glass			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
1555cc16cbfSSimon Glass		>;
1565cc16cbfSSimon Glass	};
157*1480fdf8STom Rini
158*1480fdf8STom Rini	mmc1_pins: pinmux_mmc1_pins {
159*1480fdf8STom Rini		pinctrl-single,pins = <
160*1480fdf8STom Rini			0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
161*1480fdf8STom Rini		>;
1625cc16cbfSSimon Glass	};
1635cc16cbfSSimon Glass
164*1480fdf8STom Rini	emmc_pins: pinmux_emmc_pins {
165*1480fdf8STom Rini		pinctrl-single,pins = <
166*1480fdf8STom Rini			0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
167*1480fdf8STom Rini			0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
168*1480fdf8STom Rini			0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
169*1480fdf8STom Rini			0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
170*1480fdf8STom Rini			0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
171*1480fdf8STom Rini			0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
172*1480fdf8STom Rini			0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
173*1480fdf8STom Rini			0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
174*1480fdf8STom Rini			0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
175*1480fdf8STom Rini			0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
176*1480fdf8STom Rini		>;
177*1480fdf8STom Rini	};
178*1480fdf8STom Rini};
179*1480fdf8STom Rini
180*1480fdf8STom Rini&uart0 {
1815cc16cbfSSimon Glass	pinctrl-names = "default";
1825cc16cbfSSimon Glass	pinctrl-0 = <&uart0_pins>;
1835cc16cbfSSimon Glass
1845cc16cbfSSimon Glass	status = "okay";
1855cc16cbfSSimon Glass};
1865cc16cbfSSimon Glass
187*1480fdf8STom Rini&usb {
1885cc16cbfSSimon Glass	status = "okay";
1895cc16cbfSSimon Glass};
1905cc16cbfSSimon Glass
191*1480fdf8STom Rini&usb_ctrl_mod {
1925cc16cbfSSimon Glass	status = "okay";
1935cc16cbfSSimon Glass};
1945cc16cbfSSimon Glass
195*1480fdf8STom Rini&usb0_phy {
1965cc16cbfSSimon Glass	status = "okay";
1975cc16cbfSSimon Glass};
1985cc16cbfSSimon Glass
199*1480fdf8STom Rini&usb1_phy {
2005cc16cbfSSimon Glass	status = "okay";
2015cc16cbfSSimon Glass};
2025cc16cbfSSimon Glass
203*1480fdf8STom Rini&usb0 {
204*1480fdf8STom Rini	status = "okay";
205*1480fdf8STom Rini	dr_mode = "peripheral";
206*1480fdf8STom Rini};
207*1480fdf8STom Rini
208*1480fdf8STom Rini&usb1 {
2095cc16cbfSSimon Glass	status = "okay";
2105cc16cbfSSimon Glass	dr_mode = "host";
2115cc16cbfSSimon Glass};
2125cc16cbfSSimon Glass
213*1480fdf8STom Rini&cppi41dma  {
2145cc16cbfSSimon Glass	status = "okay";
2155cc16cbfSSimon Glass};
2165cc16cbfSSimon Glass
217*1480fdf8STom Rini&i2c0 {
2185cc16cbfSSimon Glass	pinctrl-names = "default";
2195cc16cbfSSimon Glass	pinctrl-0 = <&i2c0_pins>;
2205cc16cbfSSimon Glass
2215cc16cbfSSimon Glass	status = "okay";
2225cc16cbfSSimon Glass	clock-frequency = <400000>;
2235cc16cbfSSimon Glass
2245cc16cbfSSimon Glass	tps: tps@24 {
2255cc16cbfSSimon Glass		reg = <0x24>;
2265cc16cbfSSimon Glass	};
2275cc16cbfSSimon Glass
228*1480fdf8STom Rini	baseboard_eeprom: baseboard_eeprom@50 {
229*1480fdf8STom Rini		compatible = "at,24c256";
230*1480fdf8STom Rini		reg = <0x50>;
231*1480fdf8STom Rini
232*1480fdf8STom Rini		#address-cells = <1>;
233*1480fdf8STom Rini		#size-cells = <1>;
234*1480fdf8STom Rini		baseboard_data: baseboard_data@0 {
235*1480fdf8STom Rini			reg = <0 0x100>;
236*1480fdf8STom Rini		};
2375cc16cbfSSimon Glass	};
2385cc16cbfSSimon Glass};
2395cc16cbfSSimon Glass
240*1480fdf8STom Rini&i2c2 {
2415cc16cbfSSimon Glass	pinctrl-names = "default";
242*1480fdf8STom Rini	pinctrl-0 = <&i2c2_pins>;
2435cc16cbfSSimon Glass
244*1480fdf8STom Rini	status = "okay";
245*1480fdf8STom Rini	clock-frequency = <100000>;
2465cc16cbfSSimon Glass
247*1480fdf8STom Rini	cape_eeprom0: cape_eeprom0@54 {
248*1480fdf8STom Rini		compatible = "at,24c256";
249*1480fdf8STom Rini		reg = <0x54>;
250*1480fdf8STom Rini		#address-cells = <1>;
251*1480fdf8STom Rini		#size-cells = <1>;
252*1480fdf8STom Rini		cape0_data: cape_data@0 {
253*1480fdf8STom Rini			reg = <0 0x100>;
254*1480fdf8STom Rini		};
2555cc16cbfSSimon Glass	};
2565cc16cbfSSimon Glass
257*1480fdf8STom Rini	cape_eeprom1: cape_eeprom1@55 {
258*1480fdf8STom Rini		compatible = "at,24c256";
259*1480fdf8STom Rini		reg = <0x55>;
260*1480fdf8STom Rini		#address-cells = <1>;
261*1480fdf8STom Rini		#size-cells = <1>;
262*1480fdf8STom Rini		cape1_data: cape_data@0 {
263*1480fdf8STom Rini			reg = <0 0x100>;
264*1480fdf8STom Rini		};
2655cc16cbfSSimon Glass	};
2665cc16cbfSSimon Glass
267*1480fdf8STom Rini	cape_eeprom2: cape_eeprom2@56 {
268*1480fdf8STom Rini		compatible = "at,24c256";
269*1480fdf8STom Rini		reg = <0x56>;
270*1480fdf8STom Rini		#address-cells = <1>;
271*1480fdf8STom Rini		#size-cells = <1>;
272*1480fdf8STom Rini		cape2_data: cape_data@0 {
273*1480fdf8STom Rini			reg = <0 0x100>;
274*1480fdf8STom Rini		};
2755cc16cbfSSimon Glass	};
2765cc16cbfSSimon Glass
277*1480fdf8STom Rini	cape_eeprom3: cape_eeprom3@57 {
278*1480fdf8STom Rini		compatible = "at,24c256";
279*1480fdf8STom Rini		reg = <0x57>;
280*1480fdf8STom Rini		#address-cells = <1>;
281*1480fdf8STom Rini		#size-cells = <1>;
282*1480fdf8STom Rini		cape3_data: cape_data@0 {
283*1480fdf8STom Rini			reg = <0 0x100>;
2845cc16cbfSSimon Glass		};
2855cc16cbfSSimon Glass	};
2865cc16cbfSSimon Glass};
2875cc16cbfSSimon Glass
288*1480fdf8STom Rini
2895cc16cbfSSimon Glass/include/ "tps65217.dtsi"
2905cc16cbfSSimon Glass
2915cc16cbfSSimon Glass&tps {
292*1480fdf8STom Rini	/*
293*1480fdf8STom Rini	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
294*1480fdf8STom Rini	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
295*1480fdf8STom Rini	 * mode and risk hardware damage if this mode is entered.
296*1480fdf8STom Rini	 *
297*1480fdf8STom Rini	 * For details, see linux-omap mailing list May 2015 thread
298*1480fdf8STom Rini	 *	[PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
299*1480fdf8STom Rini	 * In particular, messages:
300*1480fdf8STom Rini	 *	http://www.spinics.net/lists/linux-omap/msg118585.html
301*1480fdf8STom Rini	 *	http://www.spinics.net/lists/linux-omap/msg118615.html
302*1480fdf8STom Rini	 *
303*1480fdf8STom Rini	 * You can override this later with
304*1480fdf8STom Rini	 *	&tps {  /delete-property/ ti,pmic-shutdown-controller;  }
305*1480fdf8STom Rini	 * if you want to use RTC-only mode and made sure you are not affected
306*1480fdf8STom Rini	 * by the hardware problems. (Tip: double-check by performing a current
307*1480fdf8STom Rini	 * measurement after shutdown: it should be less than 1 mA.)
308*1480fdf8STom Rini	 */
309*1480fdf8STom Rini	ti,pmic-shutdown-controller;
310*1480fdf8STom Rini
3115cc16cbfSSimon Glass	regulators {
3125cc16cbfSSimon Glass		dcdc1_reg: regulator@0 {
313*1480fdf8STom Rini			regulator-name = "vdds_dpr";
3145cc16cbfSSimon Glass			regulator-always-on;
3155cc16cbfSSimon Glass		};
3165cc16cbfSSimon Glass
3175cc16cbfSSimon Glass		dcdc2_reg: regulator@1 {
3185cc16cbfSSimon Glass			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
3195cc16cbfSSimon Glass			regulator-name = "vdd_mpu";
3205cc16cbfSSimon Glass			regulator-min-microvolt = <925000>;
3215cc16cbfSSimon Glass			regulator-max-microvolt = <1325000>;
3225cc16cbfSSimon Glass			regulator-boot-on;
3235cc16cbfSSimon Glass			regulator-always-on;
3245cc16cbfSSimon Glass		};
3255cc16cbfSSimon Glass
3265cc16cbfSSimon Glass		dcdc3_reg: regulator@2 {
3275cc16cbfSSimon Glass			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
3285cc16cbfSSimon Glass			regulator-name = "vdd_core";
3295cc16cbfSSimon Glass			regulator-min-microvolt = <925000>;
3305cc16cbfSSimon Glass			regulator-max-microvolt = <1150000>;
3315cc16cbfSSimon Glass			regulator-boot-on;
3325cc16cbfSSimon Glass			regulator-always-on;
3335cc16cbfSSimon Glass		};
3345cc16cbfSSimon Glass
3355cc16cbfSSimon Glass		ldo1_reg: regulator@3 {
336*1480fdf8STom Rini			regulator-name = "vio,vrtc,vdds";
3375cc16cbfSSimon Glass			regulator-always-on;
3385cc16cbfSSimon Glass		};
3395cc16cbfSSimon Glass
3405cc16cbfSSimon Glass		ldo2_reg: regulator@4 {
341*1480fdf8STom Rini			regulator-name = "vdd_3v3aux";
3425cc16cbfSSimon Glass			regulator-always-on;
3435cc16cbfSSimon Glass		};
3445cc16cbfSSimon Glass
3455cc16cbfSSimon Glass		ldo3_reg: regulator@5 {
346*1480fdf8STom Rini			regulator-name = "vdd_1v8";
3475cc16cbfSSimon Glass			regulator-always-on;
3485cc16cbfSSimon Glass		};
3495cc16cbfSSimon Glass
3505cc16cbfSSimon Glass		ldo4_reg: regulator@6 {
351*1480fdf8STom Rini			regulator-name = "vdd_3v3a";
3525cc16cbfSSimon Glass			regulator-always-on;
3535cc16cbfSSimon Glass		};
3545cc16cbfSSimon Glass	};
3555cc16cbfSSimon Glass};
3565cc16cbfSSimon Glass
3575cc16cbfSSimon Glass&cpsw_emac0 {
3585cc16cbfSSimon Glass	phy_id = <&davinci_mdio>, <0>;
3595cc16cbfSSimon Glass	phy-mode = "mii";
3605cc16cbfSSimon Glass};
3615cc16cbfSSimon Glass
3625cc16cbfSSimon Glass&cpsw_emac1 {
3635cc16cbfSSimon Glass	phy_id = <&davinci_mdio>, <1>;
3645cc16cbfSSimon Glass	phy-mode = "mii";
3655cc16cbfSSimon Glass};
3665cc16cbfSSimon Glass
3675cc16cbfSSimon Glass&mac {
3685cc16cbfSSimon Glass	pinctrl-names = "default", "sleep";
3695cc16cbfSSimon Glass	pinctrl-0 = <&cpsw_default>;
3705cc16cbfSSimon Glass	pinctrl-1 = <&cpsw_sleep>;
371*1480fdf8STom Rini	status = "okay";
3725cc16cbfSSimon Glass};
3735cc16cbfSSimon Glass
3745cc16cbfSSimon Glass&davinci_mdio {
3755cc16cbfSSimon Glass	pinctrl-names = "default", "sleep";
3765cc16cbfSSimon Glass	pinctrl-0 = <&davinci_mdio_default>;
3775cc16cbfSSimon Glass	pinctrl-1 = <&davinci_mdio_sleep>;
378*1480fdf8STom Rini	status = "okay";
379*1480fdf8STom Rini};
380*1480fdf8STom Rini
381*1480fdf8STom Rini&mmc1 {
382*1480fdf8STom Rini	status = "okay";
383*1480fdf8STom Rini	bus-width = <0x4>;
384*1480fdf8STom Rini	pinctrl-names = "default";
385*1480fdf8STom Rini	pinctrl-0 = <&mmc1_pins>;
386*1480fdf8STom Rini	cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
387*1480fdf8STom Rini	cd-inverted;
388*1480fdf8STom Rini};
389*1480fdf8STom Rini
390*1480fdf8STom Rini&aes {
391*1480fdf8STom Rini	status = "okay";
392*1480fdf8STom Rini};
393*1480fdf8STom Rini
394*1480fdf8STom Rini&sham {
395*1480fdf8STom Rini	status = "okay";
3965cc16cbfSSimon Glass};
397