xref: /openbmc/u-boot/arch/arm/cpu/u-boot.lds (revision 980d6a55119f757ade4abed88bf4b2b7494c68e6)
1dde3b70dSSimon Glass/*
2dde3b70dSSimon Glass * Copyright (c) 2004-2008 Texas Instruments
3dde3b70dSSimon Glass *
4dde3b70dSSimon Glass * (C) Copyright 2002
5dde3b70dSSimon Glass * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6dde3b70dSSimon Glass *
71a459660SWolfgang Denk * SPDX-License-Identifier:	GPL-2.0+
8dde3b70dSSimon Glass */
9dde3b70dSSimon Glass
10bf433afdSMarc Zyngier#include <config.h>
11*980d6a55SChen-Yu Tsai#include <asm/psci.h>
12bf433afdSMarc Zyngier
13dde3b70dSSimon GlassOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
14dde3b70dSSimon GlassOUTPUT_ARCH(arm)
15dde3b70dSSimon GlassENTRY(_start)
16dde3b70dSSimon GlassSECTIONS
17dde3b70dSSimon Glass{
18c1352119SSimon Glass#ifndef CONFIG_CMDLINE
19c1352119SSimon Glass	/DISCARD/ : { *(.u_boot_list_2_cmd_*) }
20c1352119SSimon Glass#endif
21c5e954ecSWang Dongsheng#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
22d47cb0b6SPeng Fan	/*
23c5e954ecSWang Dongsheng	 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
24c5e954ecSWang Dongsheng	 * bundle with u-boot, and code offsets are fixed. Secure zone
25c5e954ecSWang Dongsheng	 * only needs to be copied from the loading address to
26c5e954ecSWang Dongsheng	 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
27c5e954ecSWang Dongsheng	 * address for secure code.
28d47cb0b6SPeng Fan	 *
29c5e954ecSWang Dongsheng	 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
30c5e954ecSWang Dongsheng	 * be included in u-boot address space, and some absolute address
31c5e954ecSWang Dongsheng	 * were used in secure code. The absolute addresses of the secure
32c5e954ecSWang Dongsheng	 * code also needs to be relocated along with the accompanying u-boot
33c5e954ecSWang Dongsheng	 * code.
34c5e954ecSWang Dongsheng	 *
35c5e954ecSWang Dongsheng	 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
36d47cb0b6SPeng Fan	 */
37d47cb0b6SPeng Fan	/DISCARD/ : { *(.rel._secure*) }
38c5e954ecSWang Dongsheng#endif
39dde3b70dSSimon Glass	. = 0x00000000;
40dde3b70dSSimon Glass
41dde3b70dSSimon Glass	. = ALIGN(4);
42dde3b70dSSimon Glass	.text :
43dde3b70dSSimon Glass	{
44d026dec8SAlbert ARIBAUD		*(.__image_copy_start)
4541623c91SAlbert ARIBAUD		*(.vectors)
46b68d6712SStephen Warren		CPUDIR/start.o (.text*)
47b68d6712SStephen Warren		*(.text*)
48dde3b70dSSimon Glass	}
49dde3b70dSSimon Glass
50104d6fb6SJan Kiszka#ifdef CONFIG_ARMV7_NONSEC
51bf433afdSMarc Zyngier
52a1274cc9SChen-Yu Tsai	/* Align the secure section only if we're going to use it in situ */
53a1274cc9SChen-Yu Tsai	.__secure_start :
54a1274cc9SChen-Yu Tsai#ifndef CONFIG_ARMV7_SECURE_BASE
55a1274cc9SChen-Yu Tsai		ALIGN(CONSTANT(COMMONPAGESIZE))
56a1274cc9SChen-Yu Tsai#endif
57a1274cc9SChen-Yu Tsai	{
58a1274cc9SChen-Yu Tsai		KEEP(*(.__secure_start))
59a1274cc9SChen-Yu Tsai	}
60a1274cc9SChen-Yu Tsai
61bf433afdSMarc Zyngier#ifndef CONFIG_ARMV7_SECURE_BASE
62bf433afdSMarc Zyngier#define CONFIG_ARMV7_SECURE_BASE
63b56e06d3SChen-Yu Tsai#define __ARMV7_PSCI_STACK_IN_RAM
64bf433afdSMarc Zyngier#endif
65bf433afdSMarc Zyngier
66bf433afdSMarc Zyngier	.secure_text CONFIG_ARMV7_SECURE_BASE :
67bf433afdSMarc Zyngier		AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
68bf433afdSMarc Zyngier	{
69bf433afdSMarc Zyngier		*(._secure.text)
70bf433afdSMarc Zyngier	}
71bf433afdSMarc Zyngier
72*980d6a55SChen-Yu Tsai	.secure_stack ALIGN(ADDR(.secure_text) + SIZEOF(.secure_text),
73*980d6a55SChen-Yu Tsai			    CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
74b56e06d3SChen-Yu Tsai#ifdef __ARMV7_PSCI_STACK_IN_RAM
75*980d6a55SChen-Yu Tsai		AT(ADDR(.secure_stack))
76*980d6a55SChen-Yu Tsai#else
77*980d6a55SChen-Yu Tsai		AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))
78*980d6a55SChen-Yu Tsai#endif
79*980d6a55SChen-Yu Tsai	{
80*980d6a55SChen-Yu Tsai		KEEP(*(.__secure_stack_start))
81*980d6a55SChen-Yu Tsai
82*980d6a55SChen-Yu Tsai		/* Skip addreses for stack */
83*980d6a55SChen-Yu Tsai		. = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
84*980d6a55SChen-Yu Tsai
85*980d6a55SChen-Yu Tsai		/* Align end of stack section to page boundary */
86*980d6a55SChen-Yu Tsai		. = ALIGN(CONSTANT(COMMONPAGESIZE));
87*980d6a55SChen-Yu Tsai
88*980d6a55SChen-Yu Tsai		KEEP(*(.__secure_stack_end))
89*980d6a55SChen-Yu Tsai	}
90*980d6a55SChen-Yu Tsai
91*980d6a55SChen-Yu Tsai#ifndef __ARMV7_PSCI_STACK_IN_RAM
92*980d6a55SChen-Yu Tsai	/* Reset VMA but don't allocate space if we have secure SRAM */
93*980d6a55SChen-Yu Tsai	. = LOADADDR(.secure_stack);
94b56e06d3SChen-Yu Tsai#endif
95b56e06d3SChen-Yu Tsai
96*980d6a55SChen-Yu Tsai	.__secure_end : AT(ADDR(.__secure_end)) {
97bf433afdSMarc Zyngier		*(.__secure_end)
98bf433afdSMarc Zyngier		LONG(0x1d1071c);	/* Must output something to reset LMA */
99bf433afdSMarc Zyngier	}
100bf433afdSMarc Zyngier#endif
101bf433afdSMarc Zyngier
102dde3b70dSSimon Glass	. = ALIGN(4);
103dde3b70dSSimon Glass	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
104dde3b70dSSimon Glass
105dde3b70dSSimon Glass	. = ALIGN(4);
106dde3b70dSSimon Glass	.data : {
107b68d6712SStephen Warren		*(.data*)
108dde3b70dSSimon Glass	}
109dde3b70dSSimon Glass
110dde3b70dSSimon Glass	. = ALIGN(4);
111dde3b70dSSimon Glass
112dde3b70dSSimon Glass	. = .;
113dde3b70dSSimon Glass
114dde3b70dSSimon Glass	. = ALIGN(4);
11555675142SMarek Vasut	.u_boot_list : {
116ef123c52SAlbert ARIBAUD		KEEP(*(SORT(.u_boot_list*)));
11755675142SMarek Vasut	}
11855675142SMarek Vasut
11955675142SMarek Vasut	. = ALIGN(4);
120dde3b70dSSimon Glass
12150149ea3SAlexander Graf	.__efi_runtime_start : {
12250149ea3SAlexander Graf		*(.__efi_runtime_start)
12350149ea3SAlexander Graf	}
12450149ea3SAlexander Graf
12550149ea3SAlexander Graf	.efi_runtime : {
12650149ea3SAlexander Graf		*(efi_runtime_text)
12750149ea3SAlexander Graf		*(efi_runtime_data)
12850149ea3SAlexander Graf	}
12950149ea3SAlexander Graf
13050149ea3SAlexander Graf	.__efi_runtime_stop : {
13150149ea3SAlexander Graf		*(.__efi_runtime_stop)
13250149ea3SAlexander Graf	}
13350149ea3SAlexander Graf
13450149ea3SAlexander Graf	.efi_runtime_rel_start :
13550149ea3SAlexander Graf	{
13650149ea3SAlexander Graf		*(.__efi_runtime_rel_start)
13750149ea3SAlexander Graf	}
13850149ea3SAlexander Graf
13950149ea3SAlexander Graf	.efi_runtime_rel : {
14050149ea3SAlexander Graf		*(.relefi_runtime_text)
14150149ea3SAlexander Graf		*(.relefi_runtime_data)
14250149ea3SAlexander Graf	}
14350149ea3SAlexander Graf
14450149ea3SAlexander Graf	.efi_runtime_rel_stop :
14550149ea3SAlexander Graf	{
14650149ea3SAlexander Graf		*(.__efi_runtime_rel_stop)
14750149ea3SAlexander Graf	}
14850149ea3SAlexander Graf
14950149ea3SAlexander Graf	. = ALIGN(4);
15050149ea3SAlexander Graf
151d026dec8SAlbert ARIBAUD	.image_copy_end :
152d026dec8SAlbert ARIBAUD	{
153d026dec8SAlbert ARIBAUD		*(.__image_copy_end)
154d026dec8SAlbert ARIBAUD	}
155dde3b70dSSimon Glass
15647bd65efSAlbert ARIBAUD	.rel_dyn_start :
15747bd65efSAlbert ARIBAUD	{
15847bd65efSAlbert ARIBAUD		*(.__rel_dyn_start)
15947bd65efSAlbert ARIBAUD	}
16047bd65efSAlbert ARIBAUD
161dde3b70dSSimon Glass	.rel.dyn : {
162dde3b70dSSimon Glass		*(.rel*)
16347bd65efSAlbert ARIBAUD	}
16447bd65efSAlbert ARIBAUD
16547bd65efSAlbert ARIBAUD	.rel_dyn_end :
16647bd65efSAlbert ARIBAUD	{
16747bd65efSAlbert ARIBAUD		*(.__rel_dyn_end)
168dde3b70dSSimon Glass	}
169dde3b70dSSimon Glass
170d0b5d9daSAlbert ARIBAUD	.end :
171d0b5d9daSAlbert ARIBAUD	{
172d0b5d9daSAlbert ARIBAUD		*(.__end)
173d0b5d9daSAlbert ARIBAUD	}
174d0b5d9daSAlbert ARIBAUD
175d0b5d9daSAlbert ARIBAUD	_image_binary_end = .;
176dde3b70dSSimon Glass
177dde3b70dSSimon Glass	/*
178dde3b70dSSimon Glass	 * Deprecated: this MMU section is used by pxa at present but
179dde3b70dSSimon Glass	 * should not be used by new boards/CPUs.
180dde3b70dSSimon Glass	 */
181dde3b70dSSimon Glass	. = ALIGN(4096);
182dde3b70dSSimon Glass	.mmutable : {
183dde3b70dSSimon Glass		*(.mmutable)
184dde3b70dSSimon Glass	}
185dde3b70dSSimon Glass
186f84a7b8fSAlbert ARIBAUD/*
187f84a7b8fSAlbert ARIBAUD * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
188f84a7b8fSAlbert ARIBAUD * __bss_base and __bss_limit are for linker only (overlay ordering)
189f84a7b8fSAlbert ARIBAUD */
190f84a7b8fSAlbert ARIBAUD
1913ebd1cbcSAlbert ARIBAUD	.bss_start __rel_dyn_start (OVERLAY) : {
1923ebd1cbcSAlbert ARIBAUD		KEEP(*(.__bss_start));
193f84a7b8fSAlbert ARIBAUD		__bss_base = .;
1943ebd1cbcSAlbert ARIBAUD	}
1953ebd1cbcSAlbert ARIBAUD
196f84a7b8fSAlbert ARIBAUD	.bss __bss_base (OVERLAY) : {
197b68d6712SStephen Warren		*(.bss*)
198dde3b70dSSimon Glass		 . = ALIGN(4);
199f84a7b8fSAlbert ARIBAUD		 __bss_limit = .;
200dde3b70dSSimon Glass	}
201dde3b70dSSimon Glass
202f84a7b8fSAlbert ARIBAUD	.bss_end __bss_limit (OVERLAY) : {
203f84a7b8fSAlbert ARIBAUD		KEEP(*(.__bss_end));
204dde3b70dSSimon Glass	}
205dde3b70dSSimon Glass
206d0b5d9daSAlbert ARIBAUD	.dynsym _image_binary_end : { *(.dynsym) }
20747ed5dd0SAlbert ARIBAUD	.dynbss : { *(.dynbss) }
20847ed5dd0SAlbert ARIBAUD	.dynstr : { *(.dynstr*) }
20947ed5dd0SAlbert ARIBAUD	.dynamic : { *(.dynamic*) }
21047ed5dd0SAlbert ARIBAUD	.plt : { *(.plt*) }
21147ed5dd0SAlbert ARIBAUD	.interp : { *(.interp*) }
2122c67e0e7SAndreas Färber	.gnu.hash : { *(.gnu.hash) }
21347ed5dd0SAlbert ARIBAUD	.gnu : { *(.gnu*) }
21447ed5dd0SAlbert ARIBAUD	.ARM.exidx : { *(.ARM.exidx*) }
215b02bfc4dSAlbert ARIBAUD	.gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
216dde3b70dSSimon Glass}
217