xref: /openbmc/u-boot/arch/arm/cpu/u-boot.lds (revision 50149ea37a21dcbed675297f1536c31a7db39c19)
1dde3b70dSSimon Glass/*
2dde3b70dSSimon Glass * Copyright (c) 2004-2008 Texas Instruments
3dde3b70dSSimon Glass *
4dde3b70dSSimon Glass * (C) Copyright 2002
5dde3b70dSSimon Glass * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6dde3b70dSSimon Glass *
71a459660SWolfgang Denk * SPDX-License-Identifier:	GPL-2.0+
8dde3b70dSSimon Glass */
9dde3b70dSSimon Glass
10bf433afdSMarc Zyngier#include <config.h>
11bf433afdSMarc Zyngier
12dde3b70dSSimon GlassOUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13dde3b70dSSimon GlassOUTPUT_ARCH(arm)
14dde3b70dSSimon GlassENTRY(_start)
15dde3b70dSSimon GlassSECTIONS
16dde3b70dSSimon Glass{
17c5e954ecSWang Dongsheng#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
18d47cb0b6SPeng Fan	/*
19c5e954ecSWang Dongsheng	 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
20c5e954ecSWang Dongsheng	 * bundle with u-boot, and code offsets are fixed. Secure zone
21c5e954ecSWang Dongsheng	 * only needs to be copied from the loading address to
22c5e954ecSWang Dongsheng	 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
23c5e954ecSWang Dongsheng	 * address for secure code.
24d47cb0b6SPeng Fan	 *
25c5e954ecSWang Dongsheng	 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
26c5e954ecSWang Dongsheng	 * be included in u-boot address space, and some absolute address
27c5e954ecSWang Dongsheng	 * were used in secure code. The absolute addresses of the secure
28c5e954ecSWang Dongsheng	 * code also needs to be relocated along with the accompanying u-boot
29c5e954ecSWang Dongsheng	 * code.
30c5e954ecSWang Dongsheng	 *
31c5e954ecSWang Dongsheng	 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
32d47cb0b6SPeng Fan	 */
33d47cb0b6SPeng Fan	/DISCARD/ : { *(.rel._secure*) }
34c5e954ecSWang Dongsheng#endif
35dde3b70dSSimon Glass	. = 0x00000000;
36dde3b70dSSimon Glass
37dde3b70dSSimon Glass	. = ALIGN(4);
38dde3b70dSSimon Glass	.text :
39dde3b70dSSimon Glass	{
40d026dec8SAlbert ARIBAUD		*(.__image_copy_start)
4141623c91SAlbert ARIBAUD		*(.vectors)
42b68d6712SStephen Warren		CPUDIR/start.o (.text*)
43b68d6712SStephen Warren		*(.text*)
44dde3b70dSSimon Glass	}
45dde3b70dSSimon Glass
46104d6fb6SJan Kiszka#ifdef CONFIG_ARMV7_NONSEC
47bf433afdSMarc Zyngier
48bf433afdSMarc Zyngier#ifndef CONFIG_ARMV7_SECURE_BASE
49bf433afdSMarc Zyngier#define CONFIG_ARMV7_SECURE_BASE
50bf433afdSMarc Zyngier#endif
51bf433afdSMarc Zyngier
52bf433afdSMarc Zyngier	.__secure_start : {
53bf433afdSMarc Zyngier		. = ALIGN(0x1000);
54bf433afdSMarc Zyngier		*(.__secure_start)
55bf433afdSMarc Zyngier	}
56bf433afdSMarc Zyngier
57bf433afdSMarc Zyngier	.secure_text CONFIG_ARMV7_SECURE_BASE :
58bf433afdSMarc Zyngier		AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
59bf433afdSMarc Zyngier	{
60bf433afdSMarc Zyngier		*(._secure.text)
61bf433afdSMarc Zyngier	}
62bf433afdSMarc Zyngier
63bf433afdSMarc Zyngier	. = LOADADDR(.__secure_start) +
64bf433afdSMarc Zyngier		SIZEOF(.__secure_start) +
65bf433afdSMarc Zyngier		SIZEOF(.secure_text);
66bf433afdSMarc Zyngier
67bf433afdSMarc Zyngier	__secure_end_lma = .;
68bf433afdSMarc Zyngier	.__secure_end : AT(__secure_end_lma) {
69bf433afdSMarc Zyngier		*(.__secure_end)
70bf433afdSMarc Zyngier		LONG(0x1d1071c);	/* Must output something to reset LMA */
71bf433afdSMarc Zyngier	}
72bf433afdSMarc Zyngier#endif
73bf433afdSMarc Zyngier
74dde3b70dSSimon Glass	. = ALIGN(4);
75dde3b70dSSimon Glass	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
76dde3b70dSSimon Glass
77dde3b70dSSimon Glass	. = ALIGN(4);
78dde3b70dSSimon Glass	.data : {
79b68d6712SStephen Warren		*(.data*)
80dde3b70dSSimon Glass	}
81dde3b70dSSimon Glass
82dde3b70dSSimon Glass	. = ALIGN(4);
83dde3b70dSSimon Glass
84dde3b70dSSimon Glass	. = .;
85dde3b70dSSimon Glass
86dde3b70dSSimon Glass	. = ALIGN(4);
8755675142SMarek Vasut	.u_boot_list : {
88ef123c52SAlbert ARIBAUD		KEEP(*(SORT(.u_boot_list*)));
8955675142SMarek Vasut	}
9055675142SMarek Vasut
9155675142SMarek Vasut	. = ALIGN(4);
92dde3b70dSSimon Glass
93*50149ea3SAlexander Graf	.__efi_runtime_start : {
94*50149ea3SAlexander Graf		*(.__efi_runtime_start)
95*50149ea3SAlexander Graf	}
96*50149ea3SAlexander Graf
97*50149ea3SAlexander Graf	.efi_runtime : {
98*50149ea3SAlexander Graf		*(efi_runtime_text)
99*50149ea3SAlexander Graf		*(efi_runtime_data)
100*50149ea3SAlexander Graf	}
101*50149ea3SAlexander Graf
102*50149ea3SAlexander Graf	.__efi_runtime_stop : {
103*50149ea3SAlexander Graf		*(.__efi_runtime_stop)
104*50149ea3SAlexander Graf	}
105*50149ea3SAlexander Graf
106*50149ea3SAlexander Graf	.efi_runtime_rel_start :
107*50149ea3SAlexander Graf	{
108*50149ea3SAlexander Graf		*(.__efi_runtime_rel_start)
109*50149ea3SAlexander Graf	}
110*50149ea3SAlexander Graf
111*50149ea3SAlexander Graf	.efi_runtime_rel : {
112*50149ea3SAlexander Graf		*(.relefi_runtime_text)
113*50149ea3SAlexander Graf		*(.relefi_runtime_data)
114*50149ea3SAlexander Graf	}
115*50149ea3SAlexander Graf
116*50149ea3SAlexander Graf	.efi_runtime_rel_stop :
117*50149ea3SAlexander Graf	{
118*50149ea3SAlexander Graf		*(.__efi_runtime_rel_stop)
119*50149ea3SAlexander Graf	}
120*50149ea3SAlexander Graf
121*50149ea3SAlexander Graf	. = ALIGN(4);
122*50149ea3SAlexander Graf
123d026dec8SAlbert ARIBAUD	.image_copy_end :
124d026dec8SAlbert ARIBAUD	{
125d026dec8SAlbert ARIBAUD		*(.__image_copy_end)
126d026dec8SAlbert ARIBAUD	}
127dde3b70dSSimon Glass
12847bd65efSAlbert ARIBAUD	.rel_dyn_start :
12947bd65efSAlbert ARIBAUD	{
13047bd65efSAlbert ARIBAUD		*(.__rel_dyn_start)
13147bd65efSAlbert ARIBAUD	}
13247bd65efSAlbert ARIBAUD
133dde3b70dSSimon Glass	.rel.dyn : {
134dde3b70dSSimon Glass		*(.rel*)
13547bd65efSAlbert ARIBAUD	}
13647bd65efSAlbert ARIBAUD
13747bd65efSAlbert ARIBAUD	.rel_dyn_end :
13847bd65efSAlbert ARIBAUD	{
13947bd65efSAlbert ARIBAUD		*(.__rel_dyn_end)
140dde3b70dSSimon Glass	}
141dde3b70dSSimon Glass
142d0b5d9daSAlbert ARIBAUD	.end :
143d0b5d9daSAlbert ARIBAUD	{
144d0b5d9daSAlbert ARIBAUD		*(.__end)
145d0b5d9daSAlbert ARIBAUD	}
146d0b5d9daSAlbert ARIBAUD
147d0b5d9daSAlbert ARIBAUD	_image_binary_end = .;
148dde3b70dSSimon Glass
149dde3b70dSSimon Glass	/*
150dde3b70dSSimon Glass	 * Deprecated: this MMU section is used by pxa at present but
151dde3b70dSSimon Glass	 * should not be used by new boards/CPUs.
152dde3b70dSSimon Glass	 */
153dde3b70dSSimon Glass	. = ALIGN(4096);
154dde3b70dSSimon Glass	.mmutable : {
155dde3b70dSSimon Glass		*(.mmutable)
156dde3b70dSSimon Glass	}
157dde3b70dSSimon Glass
158f84a7b8fSAlbert ARIBAUD/*
159f84a7b8fSAlbert ARIBAUD * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
160f84a7b8fSAlbert ARIBAUD * __bss_base and __bss_limit are for linker only (overlay ordering)
161f84a7b8fSAlbert ARIBAUD */
162f84a7b8fSAlbert ARIBAUD
1633ebd1cbcSAlbert ARIBAUD	.bss_start __rel_dyn_start (OVERLAY) : {
1643ebd1cbcSAlbert ARIBAUD		KEEP(*(.__bss_start));
165f84a7b8fSAlbert ARIBAUD		__bss_base = .;
1663ebd1cbcSAlbert ARIBAUD	}
1673ebd1cbcSAlbert ARIBAUD
168f84a7b8fSAlbert ARIBAUD	.bss __bss_base (OVERLAY) : {
169b68d6712SStephen Warren		*(.bss*)
170dde3b70dSSimon Glass		 . = ALIGN(4);
171f84a7b8fSAlbert ARIBAUD		 __bss_limit = .;
172dde3b70dSSimon Glass	}
173dde3b70dSSimon Glass
174f84a7b8fSAlbert ARIBAUD	.bss_end __bss_limit (OVERLAY) : {
175f84a7b8fSAlbert ARIBAUD		KEEP(*(.__bss_end));
176dde3b70dSSimon Glass	}
177dde3b70dSSimon Glass
178d0b5d9daSAlbert ARIBAUD	.dynsym _image_binary_end : { *(.dynsym) }
17947ed5dd0SAlbert ARIBAUD	.dynbss : { *(.dynbss) }
18047ed5dd0SAlbert ARIBAUD	.dynstr : { *(.dynstr*) }
18147ed5dd0SAlbert ARIBAUD	.dynamic : { *(.dynamic*) }
18247ed5dd0SAlbert ARIBAUD	.plt : { *(.plt*) }
18347ed5dd0SAlbert ARIBAUD	.interp : { *(.interp*) }
1842c67e0e7SAndreas Färber	.gnu.hash : { *(.gnu.hash) }
18547ed5dd0SAlbert ARIBAUD	.gnu : { *(.gnu*) }
18647ed5dd0SAlbert ARIBAUD	.ARM.exidx : { *(.ARM.exidx*) }
187b02bfc4dSAlbert ARIBAUD	.gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
188dde3b70dSSimon Glass}
189