xref: /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/fdt.c (revision f13c99c2a265d0586702523fab56a3562de31f86)
19f3183d2SMingkai Hu /*
29f3183d2SMingkai Hu  * Copyright 2014-2015 Freescale Semiconductor, Inc.
39f3183d2SMingkai Hu  *
49f3183d2SMingkai Hu  * SPDX-License-Identifier:	GPL-2.0+
59f3183d2SMingkai Hu  */
69f3183d2SMingkai Hu 
79f3183d2SMingkai Hu #include <common.h>
89f3183d2SMingkai Hu #include <libfdt.h>
99f3183d2SMingkai Hu #include <fdt_support.h>
109f3183d2SMingkai Hu #include <phy.h>
119f3183d2SMingkai Hu #ifdef CONFIG_FSL_LSCH3
129f3183d2SMingkai Hu #include <asm/arch/fdt.h>
139f3183d2SMingkai Hu #endif
149f3183d2SMingkai Hu #ifdef CONFIG_FSL_ESDHC
159f3183d2SMingkai Hu #include <fsl_esdhc.h>
169f3183d2SMingkai Hu #endif
170e52b6feSQianyu Gong #ifdef CONFIG_SYS_DPAA_FMAN
180e52b6feSQianyu Gong #include <fsl_fman.h>
190e52b6feSQianyu Gong #endif
209f3183d2SMingkai Hu #ifdef CONFIG_MP
219f3183d2SMingkai Hu #include <asm/arch/mp.h>
229f3183d2SMingkai Hu #endif
23*f13c99c2SAlex Porosanu #include <fsl_sec.h>
24*f13c99c2SAlex Porosanu #include <asm/arch-fsl-layerscape/soc.h>
259f3183d2SMingkai Hu 
26e8297341SShaohui Xie int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
27e8297341SShaohui Xie {
28e8297341SShaohui Xie 	return fdt_setprop_string(blob, offset, "phy-connection-type",
29e8297341SShaohui Xie 					 phy_string_for_interface(phyc));
30e8297341SShaohui Xie }
31e8297341SShaohui Xie 
329f3183d2SMingkai Hu #ifdef CONFIG_MP
339f3183d2SMingkai Hu void ft_fixup_cpu(void *blob)
349f3183d2SMingkai Hu {
359f3183d2SMingkai Hu 	int off;
369f3183d2SMingkai Hu 	__maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
379f3183d2SMingkai Hu 	fdt32_t *reg;
389f3183d2SMingkai Hu 	int addr_cells;
399f3183d2SMingkai Hu 	u64 val, core_id;
409f3183d2SMingkai Hu 	size_t *boot_code_size = &(__secondary_boot_code_size);
419f3183d2SMingkai Hu 
429f3183d2SMingkai Hu 	off = fdt_path_offset(blob, "/cpus");
439f3183d2SMingkai Hu 	if (off < 0) {
449f3183d2SMingkai Hu 		puts("couldn't find /cpus node\n");
459f3183d2SMingkai Hu 		return;
469f3183d2SMingkai Hu 	}
479f3183d2SMingkai Hu 	of_bus_default_count_cells(blob, off, &addr_cells, NULL);
489f3183d2SMingkai Hu 
499f3183d2SMingkai Hu 	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
509f3183d2SMingkai Hu 	while (off != -FDT_ERR_NOTFOUND) {
519f3183d2SMingkai Hu 		reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
529f3183d2SMingkai Hu 		if (reg) {
539f3183d2SMingkai Hu 			core_id = of_read_number(reg, addr_cells);
549f3183d2SMingkai Hu 			if (core_id  == 0 || (is_core_online(core_id))) {
559f3183d2SMingkai Hu 				val = spin_tbl_addr;
569f3183d2SMingkai Hu 				val += id_to_core(core_id) *
579f3183d2SMingkai Hu 				       SPIN_TABLE_ELEM_SIZE;
589f3183d2SMingkai Hu 				val = cpu_to_fdt64(val);
599f3183d2SMingkai Hu 				fdt_setprop_string(blob, off, "enable-method",
609f3183d2SMingkai Hu 						   "spin-table");
619f3183d2SMingkai Hu 				fdt_setprop(blob, off, "cpu-release-addr",
629f3183d2SMingkai Hu 					    &val, sizeof(val));
639f3183d2SMingkai Hu 			} else {
649f3183d2SMingkai Hu 				debug("skipping offline core\n");
659f3183d2SMingkai Hu 			}
669f3183d2SMingkai Hu 		} else {
679f3183d2SMingkai Hu 			puts("Warning: found cpu node without reg property\n");
689f3183d2SMingkai Hu 		}
699f3183d2SMingkai Hu 		off = fdt_node_offset_by_prop_value(blob, off, "device_type",
709f3183d2SMingkai Hu 						    "cpu", 4);
719f3183d2SMingkai Hu 	}
729f3183d2SMingkai Hu 
739f3183d2SMingkai Hu 	fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
749f3183d2SMingkai Hu 			*boot_code_size);
759f3183d2SMingkai Hu }
769f3183d2SMingkai Hu #endif
779f3183d2SMingkai Hu 
789f3183d2SMingkai Hu void ft_cpu_setup(void *blob, bd_t *bd)
799f3183d2SMingkai Hu {
80*f13c99c2SAlex Porosanu #ifdef CONFIG_FSL_LSCH2
81*f13c99c2SAlex Porosanu 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
82*f13c99c2SAlex Porosanu 	unsigned int svr = in_be32(&gur->svr);
83*f13c99c2SAlex Porosanu 
84*f13c99c2SAlex Porosanu 	/* delete crypto node if not on an E-processor */
85*f13c99c2SAlex Porosanu 	if (!IS_E_PROCESSOR(svr))
86*f13c99c2SAlex Porosanu 		fdt_fixup_crypto_node(blob, 0);
87*f13c99c2SAlex Porosanu #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
88*f13c99c2SAlex Porosanu 	else {
89*f13c99c2SAlex Porosanu 		ccsr_sec_t __iomem *sec;
90*f13c99c2SAlex Porosanu 
91*f13c99c2SAlex Porosanu 		sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
92*f13c99c2SAlex Porosanu 		fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
93*f13c99c2SAlex Porosanu 	}
94*f13c99c2SAlex Porosanu #endif
95*f13c99c2SAlex Porosanu #endif
96*f13c99c2SAlex Porosanu 
979f3183d2SMingkai Hu #ifdef CONFIG_MP
989f3183d2SMingkai Hu 	ft_fixup_cpu(blob);
999f3183d2SMingkai Hu #endif
1009f3183d2SMingkai Hu 
1019f3183d2SMingkai Hu #ifdef CONFIG_SYS_NS16550
1029f3183d2SMingkai Hu 	do_fixup_by_compat_u32(blob, "fsl,ns16550",
1039f3183d2SMingkai Hu 			       "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
1049f3183d2SMingkai Hu #endif
1059f3183d2SMingkai Hu 
1066f14e257SPrabhakar Kushwaha 	do_fixup_by_compat_u32(blob, "fixed-clock",
1076f14e257SPrabhakar Kushwaha 			       "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
1086f14e257SPrabhakar Kushwaha 
1099f3183d2SMingkai Hu #ifdef CONFIG_PCI
1109f3183d2SMingkai Hu 	ft_pci_setup(blob, bd);
1119f3183d2SMingkai Hu #endif
1129f3183d2SMingkai Hu 
1139f3183d2SMingkai Hu #ifdef CONFIG_FSL_ESDHC
1149f3183d2SMingkai Hu 	fdt_fixup_esdhc(blob, bd);
1159f3183d2SMingkai Hu #endif
1169f3183d2SMingkai Hu 
1170e52b6feSQianyu Gong #ifdef CONFIG_SYS_DPAA_FMAN
1180e52b6feSQianyu Gong 	fdt_fixup_fman_firmware(blob);
1190e52b6feSQianyu Gong #endif
1209f3183d2SMingkai Hu }
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