19f3183d2SMingkai Hu /* 29f3183d2SMingkai Hu * Copyright 2014-2015 Freescale Semiconductor, Inc. 39f3183d2SMingkai Hu * 49f3183d2SMingkai Hu * SPDX-License-Identifier: GPL-2.0+ 59f3183d2SMingkai Hu */ 69f3183d2SMingkai Hu 79f3183d2SMingkai Hu #include <common.h> 89f3183d2SMingkai Hu #include <libfdt.h> 99f3183d2SMingkai Hu #include <fdt_support.h> 109f3183d2SMingkai Hu #include <phy.h> 119f3183d2SMingkai Hu #ifdef CONFIG_FSL_LSCH3 129f3183d2SMingkai Hu #include <asm/arch/fdt.h> 139f3183d2SMingkai Hu #endif 149f3183d2SMingkai Hu #ifdef CONFIG_FSL_ESDHC 159f3183d2SMingkai Hu #include <fsl_esdhc.h> 169f3183d2SMingkai Hu #endif 170e52b6feSQianyu Gong #ifdef CONFIG_SYS_DPAA_FMAN 180e52b6feSQianyu Gong #include <fsl_fman.h> 190e52b6feSQianyu Gong #endif 209f3183d2SMingkai Hu #ifdef CONFIG_MP 219f3183d2SMingkai Hu #include <asm/arch/mp.h> 229f3183d2SMingkai Hu #endif 23f13c99c2SAlex Porosanu #include <fsl_sec.h> 24f13c99c2SAlex Porosanu #include <asm/arch-fsl-layerscape/soc.h> 25032d5bb4SHou Zhiqiang #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT 26032d5bb4SHou Zhiqiang #include <asm/armv8/sec_firmware.h> 27032d5bb4SHou Zhiqiang #endif 289f3183d2SMingkai Hu 29e8297341SShaohui Xie int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) 30e8297341SShaohui Xie { 31e8297341SShaohui Xie return fdt_setprop_string(blob, offset, "phy-connection-type", 32e8297341SShaohui Xie phy_string_for_interface(phyc)); 33e8297341SShaohui Xie } 34e8297341SShaohui Xie 359f3183d2SMingkai Hu #ifdef CONFIG_MP 369f3183d2SMingkai Hu void ft_fixup_cpu(void *blob) 379f3183d2SMingkai Hu { 389f3183d2SMingkai Hu int off; 399f3183d2SMingkai Hu __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); 409f3183d2SMingkai Hu fdt32_t *reg; 419f3183d2SMingkai Hu int addr_cells; 429f3183d2SMingkai Hu u64 val, core_id; 439f3183d2SMingkai Hu size_t *boot_code_size = &(__secondary_boot_code_size); 44032d5bb4SHou Zhiqiang #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI) 45032d5bb4SHou Zhiqiang int node; 46032d5bb4SHou Zhiqiang u32 psci_ver; 479f3183d2SMingkai Hu 48032d5bb4SHou Zhiqiang /* Check the psci version to determine if the psci is supported */ 49032d5bb4SHou Zhiqiang psci_ver = sec_firmware_support_psci_version(); 50032d5bb4SHou Zhiqiang if (psci_ver == 0xffffffff) { 51032d5bb4SHou Zhiqiang /* remove psci DT node */ 52032d5bb4SHou Zhiqiang node = fdt_path_offset(blob, "/psci"); 53032d5bb4SHou Zhiqiang if (node >= 0) 54032d5bb4SHou Zhiqiang goto remove_psci_node; 55032d5bb4SHou Zhiqiang 56032d5bb4SHou Zhiqiang node = fdt_node_offset_by_compatible(blob, -1, "arm,psci"); 57032d5bb4SHou Zhiqiang if (node >= 0) 58032d5bb4SHou Zhiqiang goto remove_psci_node; 59032d5bb4SHou Zhiqiang 60032d5bb4SHou Zhiqiang node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2"); 61032d5bb4SHou Zhiqiang if (node >= 0) 62032d5bb4SHou Zhiqiang goto remove_psci_node; 63032d5bb4SHou Zhiqiang 64032d5bb4SHou Zhiqiang node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0"); 65032d5bb4SHou Zhiqiang if (node >= 0) 66032d5bb4SHou Zhiqiang goto remove_psci_node; 67032d5bb4SHou Zhiqiang 68032d5bb4SHou Zhiqiang remove_psci_node: 69032d5bb4SHou Zhiqiang if (node >= 0) 70032d5bb4SHou Zhiqiang fdt_del_node(blob, node); 71032d5bb4SHou Zhiqiang } else { 72032d5bb4SHou Zhiqiang return; 73032d5bb4SHou Zhiqiang } 74032d5bb4SHou Zhiqiang #endif 759f3183d2SMingkai Hu off = fdt_path_offset(blob, "/cpus"); 769f3183d2SMingkai Hu if (off < 0) { 779f3183d2SMingkai Hu puts("couldn't find /cpus node\n"); 789f3183d2SMingkai Hu return; 799f3183d2SMingkai Hu } 809f3183d2SMingkai Hu of_bus_default_count_cells(blob, off, &addr_cells, NULL); 819f3183d2SMingkai Hu 829f3183d2SMingkai Hu off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); 839f3183d2SMingkai Hu while (off != -FDT_ERR_NOTFOUND) { 849f3183d2SMingkai Hu reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); 859f3183d2SMingkai Hu if (reg) { 869f3183d2SMingkai Hu core_id = of_read_number(reg, addr_cells); 879f3183d2SMingkai Hu if (core_id == 0 || (is_core_online(core_id))) { 889f3183d2SMingkai Hu val = spin_tbl_addr; 899f3183d2SMingkai Hu val += id_to_core(core_id) * 909f3183d2SMingkai Hu SPIN_TABLE_ELEM_SIZE; 919f3183d2SMingkai Hu val = cpu_to_fdt64(val); 929f3183d2SMingkai Hu fdt_setprop_string(blob, off, "enable-method", 939f3183d2SMingkai Hu "spin-table"); 949f3183d2SMingkai Hu fdt_setprop(blob, off, "cpu-release-addr", 959f3183d2SMingkai Hu &val, sizeof(val)); 969f3183d2SMingkai Hu } else { 979f3183d2SMingkai Hu debug("skipping offline core\n"); 989f3183d2SMingkai Hu } 999f3183d2SMingkai Hu } else { 1009f3183d2SMingkai Hu puts("Warning: found cpu node without reg property\n"); 1019f3183d2SMingkai Hu } 1029f3183d2SMingkai Hu off = fdt_node_offset_by_prop_value(blob, off, "device_type", 1039f3183d2SMingkai Hu "cpu", 4); 1049f3183d2SMingkai Hu } 1059f3183d2SMingkai Hu 1069f3183d2SMingkai Hu fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, 1079f3183d2SMingkai Hu *boot_code_size); 1089f3183d2SMingkai Hu } 1099f3183d2SMingkai Hu #endif 1109f3183d2SMingkai Hu 111*c93db4f7SSriram Dash void fsl_fdt_disable_usb(void *blob) 112*c93db4f7SSriram Dash { 113*c93db4f7SSriram Dash int off; 114*c93db4f7SSriram Dash /* 115*c93db4f7SSriram Dash * SYSCLK is used as a reference clock for USB. When the USB 116*c93db4f7SSriram Dash * controller is used, SYSCLK must meet the additional requirement 117*c93db4f7SSriram Dash * of 100 MHz. 118*c93db4f7SSriram Dash */ 119*c93db4f7SSriram Dash if (CONFIG_SYS_CLK_FREQ != 100000000) { 120*c93db4f7SSriram Dash off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); 121*c93db4f7SSriram Dash while (off != -FDT_ERR_NOTFOUND) { 122*c93db4f7SSriram Dash fdt_status_disabled(blob, off); 123*c93db4f7SSriram Dash off = fdt_node_offset_by_compatible(blob, off, 124*c93db4f7SSriram Dash "snps,dwc3"); 125*c93db4f7SSriram Dash } 126*c93db4f7SSriram Dash } 127*c93db4f7SSriram Dash } 128*c93db4f7SSriram Dash 1299f3183d2SMingkai Hu void ft_cpu_setup(void *blob, bd_t *bd) 1309f3183d2SMingkai Hu { 131f13c99c2SAlex Porosanu #ifdef CONFIG_FSL_LSCH2 132f13c99c2SAlex Porosanu struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); 133f13c99c2SAlex Porosanu unsigned int svr = in_be32(&gur->svr); 134f13c99c2SAlex Porosanu 135f13c99c2SAlex Porosanu /* delete crypto node if not on an E-processor */ 136f13c99c2SAlex Porosanu if (!IS_E_PROCESSOR(svr)) 137f13c99c2SAlex Porosanu fdt_fixup_crypto_node(blob, 0); 138f13c99c2SAlex Porosanu #if CONFIG_SYS_FSL_SEC_COMPAT >= 4 139f13c99c2SAlex Porosanu else { 140f13c99c2SAlex Porosanu ccsr_sec_t __iomem *sec; 141f13c99c2SAlex Porosanu 142f13c99c2SAlex Porosanu sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; 143f13c99c2SAlex Porosanu fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms)); 144f13c99c2SAlex Porosanu } 145f13c99c2SAlex Porosanu #endif 146f13c99c2SAlex Porosanu #endif 147f13c99c2SAlex Porosanu 1489f3183d2SMingkai Hu #ifdef CONFIG_MP 1499f3183d2SMingkai Hu ft_fixup_cpu(blob); 1509f3183d2SMingkai Hu #endif 1519f3183d2SMingkai Hu 1529f3183d2SMingkai Hu #ifdef CONFIG_SYS_NS16550 1539f3183d2SMingkai Hu do_fixup_by_compat_u32(blob, "fsl,ns16550", 1549f3183d2SMingkai Hu "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); 1559f3183d2SMingkai Hu #endif 1569f3183d2SMingkai Hu 1576f14e257SPrabhakar Kushwaha do_fixup_by_compat_u32(blob, "fixed-clock", 1586f14e257SPrabhakar Kushwaha "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); 1596f14e257SPrabhakar Kushwaha 1609f3183d2SMingkai Hu #ifdef CONFIG_PCI 1619f3183d2SMingkai Hu ft_pci_setup(blob, bd); 1629f3183d2SMingkai Hu #endif 1639f3183d2SMingkai Hu 1649f3183d2SMingkai Hu #ifdef CONFIG_FSL_ESDHC 1659f3183d2SMingkai Hu fdt_fixup_esdhc(blob, bd); 1669f3183d2SMingkai Hu #endif 1679f3183d2SMingkai Hu 1680e52b6feSQianyu Gong #ifdef CONFIG_SYS_DPAA_FMAN 1690e52b6feSQianyu Gong fdt_fixup_fman_firmware(blob); 1700e52b6feSQianyu Gong #endif 171*c93db4f7SSriram Dash fsl_fdt_disable_usb(blob); 172*c93db4f7SSriram Dash 1739f3183d2SMingkai Hu } 174