xref: /openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/clk-bsc.c (revision 1221ce459d04a428f8880f58581f671b736c3c27)
1989ce049SDarwin Rambo /*
2989ce049SDarwin Rambo  * Copyright 2013 Broadcom Corporation.
3989ce049SDarwin Rambo  *
4989ce049SDarwin Rambo  * SPDX-License-Identifier:      GPL-2.0+
5989ce049SDarwin Rambo  */
6989ce049SDarwin Rambo 
7989ce049SDarwin Rambo #include <common.h>
8989ce049SDarwin Rambo #include <asm/io.h>
9*1221ce45SMasahiro Yamada #include <linux/errno.h>
10989ce049SDarwin Rambo #include <asm/arch/sysmap.h>
11989ce049SDarwin Rambo #include <asm/kona-common/clk.h>
12989ce049SDarwin Rambo #include "clk-core.h"
13989ce049SDarwin Rambo 
14989ce049SDarwin Rambo /* Enable appropriate clocks for a BSC/I2C port */
15989ce049SDarwin Rambo int clk_bsc_enable(void *base)
16989ce049SDarwin Rambo {
17989ce049SDarwin Rambo 	int ret;
18989ce049SDarwin Rambo 	char *bscstr, *apbstr;
19989ce049SDarwin Rambo 
20989ce049SDarwin Rambo 	switch ((u32) base) {
21989ce049SDarwin Rambo 	case PMU_BSC_BASE_ADDR:
22989ce049SDarwin Rambo 		/* PMU clock is always enabled */
23989ce049SDarwin Rambo 		return 0;
24989ce049SDarwin Rambo 	case BSC1_BASE_ADDR:
25989ce049SDarwin Rambo 		bscstr = "bsc1_clk";
26989ce049SDarwin Rambo 		apbstr = "bsc1_apb_clk";
27989ce049SDarwin Rambo 		break;
28989ce049SDarwin Rambo 	case BSC2_BASE_ADDR:
29989ce049SDarwin Rambo 		bscstr = "bsc2_clk";
30989ce049SDarwin Rambo 		apbstr = "bsc2_apb_clk";
31989ce049SDarwin Rambo 		break;
32989ce049SDarwin Rambo 	case BSC3_BASE_ADDR:
33989ce049SDarwin Rambo 		bscstr = "bsc3_clk";
34989ce049SDarwin Rambo 		apbstr = "bsc3_apb_clk";
35989ce049SDarwin Rambo 		break;
36989ce049SDarwin Rambo 	default:
37989ce049SDarwin Rambo 		printf("%s: base 0x%p not found\n", __func__, base);
38989ce049SDarwin Rambo 		return -EINVAL;
39989ce049SDarwin Rambo 	}
40989ce049SDarwin Rambo 
41989ce049SDarwin Rambo 	/* Note that the bus clock must be enabled first */
42989ce049SDarwin Rambo 
43989ce049SDarwin Rambo 	ret = clk_get_and_enable(apbstr);
44989ce049SDarwin Rambo 	if (ret)
45989ce049SDarwin Rambo 		return ret;
46989ce049SDarwin Rambo 
47989ce049SDarwin Rambo 	ret = clk_get_and_enable(bscstr);
48989ce049SDarwin Rambo 	if (ret)
49989ce049SDarwin Rambo 		return ret;
50989ce049SDarwin Rambo 
51989ce049SDarwin Rambo 	return 0;
52989ce049SDarwin Rambo }
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