1/* 2 * armboot - Startup Code for ARM926EJS CPU-core 3 * 4 * Copyright (c) 2003 Texas Instruments 5 * 6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 7 * 8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 12 * Copyright (c) 2003 Kshitij <kshitij@ti.com> 13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> 14 * 15 * See file CREDITS for list of people who contributed to this 16 * project. 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License as 20 * published by the Free Software Foundation; either version 2 of 21 * the License, or (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 31 * MA 02111-1307 USA 32 */ 33 34#include <asm-offsets.h> 35#include <config.h> 36#include <version.h> 37 38/* 39 ************************************************************************* 40 * 41 * Jump vector table as in table 3.1 in [1] 42 * 43 ************************************************************************* 44 */ 45 46 47.globl _start 48_start: 49 b reset 50 ldr pc, _undefined_instruction 51 ldr pc, _software_interrupt 52 ldr pc, _prefetch_abort 53 ldr pc, _data_abort 54 ldr pc, _not_used 55 ldr pc, _irq 56 ldr pc, _fiq 57 58_undefined_instruction: 59 .word undefined_instruction 60_software_interrupt: 61 .word software_interrupt 62_prefetch_abort: 63 .word prefetch_abort 64_data_abort: 65 .word data_abort 66_not_used: 67 .word not_used 68_irq: 69 .word irq 70_fiq: 71 .word fiq 72 73 .balignl 16,0xdeadbeef 74 75_vectors_end: 76 77/* 78 ************************************************************************* 79 * 80 * Startup Code (reset vector) 81 * 82 * do important init only if we don't start from memory! 83 * setup Memory and board specific bits prior to relocation. 84 * relocate armboot to ram 85 * setup stack 86 * 87 ************************************************************************* 88 */ 89 90.globl _TEXT_BASE 91_TEXT_BASE: 92#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE) 93 .word CONFIG_SPL_TEXT_BASE 94#else 95 .word CONFIG_SYS_TEXT_BASE 96#endif 97 98/* 99 * These are defined in the board-specific linker script. 100 * Subtracting _start from them lets the linker put their 101 * relative position in the executable instead of leaving 102 * them null. 103 */ 104.globl _bss_start_ofs 105_bss_start_ofs: 106 .word __bss_start - _start 107 108.globl _bss_end_ofs 109_bss_end_ofs: 110 .word __bss_end - _start 111 112.globl _end_ofs 113_end_ofs: 114 .word _end - _start 115 116#ifdef CONFIG_USE_IRQ 117/* IRQ stack memory (calculated at run-time) */ 118.globl IRQ_STACK_START 119IRQ_STACK_START: 120 .word 0x0badc0de 121 122/* IRQ stack memory (calculated at run-time) */ 123.globl FIQ_STACK_START 124FIQ_STACK_START: 125 .word 0x0badc0de 126#endif 127 128/* IRQ stack memory (calculated at run-time) + 8 bytes */ 129.globl IRQ_STACK_START_IN 130IRQ_STACK_START_IN: 131 .word 0x0badc0de 132 133/* 134 * the actual reset code 135 */ 136 137reset: 138 /* 139 * set the cpu to SVC32 mode 140 */ 141 mrs r0,cpsr 142 bic r0,r0,#0x1f 143 orr r0,r0,#0xd3 144 msr cpsr,r0 145 146 /* 147 * we do sys-critical inits only at reboot, 148 * not when booting from ram! 149 */ 150#ifndef CONFIG_SKIP_LOWLEVEL_INIT 151 bl cpu_init_crit 152#endif 153 154 bl _main 155 156/*------------------------------------------------------------------------------*/ 157 158#ifndef CONFIG_SPL_BUILD 159/* 160 * void relocate_code(addr_moni) 161 * 162 * This function relocates the monitor code. 163 */ 164 .globl relocate_code 165relocate_code: 166 mov r6, r0 /* save addr of destination */ 167 168 adr r0, _start 169 subs r9, r6, r0 /* r9 <- relocation offset */ 170 beq relocate_done /* skip relocation */ 171 mov r1, r6 /* r1 <- scratch for copy_loop */ 172 ldr r3, _image_copy_end_ofs 173 add r2, r0, r3 /* r2 <- source end address */ 174 175copy_loop: 176 ldmia r0!, {r10-r11} /* copy from source address [r0] */ 177 stmia r1!, {r10-r11} /* copy to target address [r1] */ 178 cmp r0, r2 /* until source end address [r2] */ 179 blo copy_loop 180 181 /* 182 * fix .rel.dyn relocations 183 */ 184 ldr r0, _TEXT_BASE /* r0 <- Text base */ 185 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 186 add r10, r10, r0 /* r10 <- sym table in FLASH */ 187 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 188 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 189 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 190 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 191fixloop: 192 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 193 add r0, r0, r9 /* r0 <- location to fix up in RAM */ 194 ldr r1, [r2, #4] 195 and r7, r1, #0xff 196 cmp r7, #23 /* relative fixup? */ 197 beq fixrel 198 cmp r7, #2 /* absolute fixup? */ 199 beq fixabs 200 /* ignore unknown type of fixup */ 201 b fixnext 202fixabs: 203 /* absolute fix: set location to (offset) symbol value */ 204 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 205 add r1, r10, r1 /* r1 <- address of symbol in table */ 206 ldr r1, [r1, #4] /* r1 <- symbol value */ 207 add r1, r1, r9 /* r1 <- relocated sym addr */ 208 b fixnext 209fixrel: 210 /* relative fix: increase location by offset */ 211 ldr r1, [r0] 212 add r1, r1, r9 213fixnext: 214 str r1, [r0] 215 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 216 cmp r2, r3 217 blo fixloop 218 219relocate_done: 220 221 mov pc, lr 222 223_image_copy_end_ofs: 224 .word __image_copy_end - _start 225_rel_dyn_start_ofs: 226 .word __rel_dyn_start - _start 227_rel_dyn_end_ofs: 228 .word __rel_dyn_end - _start 229_dynsym_start_ofs: 230 .word __dynsym_start - _start 231 232#endif 233 234 .globl c_runtime_cpu_setup 235c_runtime_cpu_setup: 236 237 mov pc, lr 238 239/* 240 ************************************************************************* 241 * 242 * CPU_init_critical registers 243 * 244 * setup important registers 245 * setup memory timing 246 * 247 ************************************************************************* 248 */ 249 250 251#ifndef CONFIG_SKIP_LOWLEVEL_INIT 252cpu_init_crit: 253 /* 254 * flush v4 I/D caches 255 */ 256 mov r0, #0 257 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */ 258 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */ 259 260 /* 261 * disable MMU stuff and caches 262 */ 263 mrc p15, 0, r0, c1, c0, 0 264 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 265 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 266 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 267 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 268 mcr p15, 0, r0, c1, c0, 0 269 270 /* 271 * Go setup Memory and board specific bits prior to relocation. 272 */ 273 mov ip, lr /* perserve link reg across call */ 274 bl lowlevel_init /* go setup memory */ 275 mov lr, ip /* restore link */ 276 mov pc, lr /* back to my caller */ 277#endif 278/* 279 ************************************************************************* 280 * 281 * Interrupt handling 282 * 283 ************************************************************************* 284 */ 285 286@ 287@ IRQ stack frame. 288@ 289#define S_FRAME_SIZE 72 290 291#define S_OLD_R0 68 292#define S_PSR 64 293#define S_PC 60 294#define S_LR 56 295#define S_SP 52 296 297#define S_IP 48 298#define S_FP 44 299#define S_R10 40 300#define S_R9 36 301#define S_R8 32 302#define S_R7 28 303#define S_R6 24 304#define S_R5 20 305#define S_R4 16 306#define S_R3 12 307#define S_R2 8 308#define S_R1 4 309#define S_R0 0 310 311#define MODE_SVC 0x13 312#define I_BIT 0x80 313 314/* 315 * use bad_save_user_regs for abort/prefetch/undef/swi ... 316 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 317 */ 318 319 .macro bad_save_user_regs 320 @ carve out a frame on current user stack 321 sub sp, sp, #S_FRAME_SIZE 322 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 323 324 ldr r2, IRQ_STACK_START_IN 325 @ get values for "aborted" pc and cpsr (into parm regs) 326 ldmia r2, {r2 - r3} 327 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 328 add r5, sp, #S_SP 329 mov r1, lr 330 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 331 mov r0, sp @ save current stack into r0 (param register) 332 .endm 333 334 .macro irq_save_user_regs 335 sub sp, sp, #S_FRAME_SIZE 336 stmia sp, {r0 - r12} @ Calling r0-r12 337 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 338 add r8, sp, #S_PC 339 stmdb r8, {sp, lr}^ @ Calling SP, LR 340 str lr, [r8, #0] @ Save calling PC 341 mrs r6, spsr 342 str r6, [r8, #4] @ Save CPSR 343 str r0, [r8, #8] @ Save OLD_R0 344 mov r0, sp 345 .endm 346 347 .macro irq_restore_user_regs 348 ldmia sp, {r0 - lr}^ @ Calling r0 - lr 349 mov r0, r0 350 ldr lr, [sp, #S_PC] @ Get PC 351 add sp, sp, #S_FRAME_SIZE 352 subs pc, lr, #4 @ return & move spsr_svc into cpsr 353 .endm 354 355 .macro get_bad_stack 356 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 357 358 str lr, [r13] @ save caller lr in position 0 of saved stack 359 mrs lr, spsr @ get the spsr 360 str lr, [r13, #4] @ save spsr in position 1 of saved stack 361 mov r13, #MODE_SVC @ prepare SVC-Mode 362 @ msr spsr_c, r13 363 msr spsr, r13 @ switch modes, make sure moves will execute 364 mov lr, pc @ capture return pc 365 movs pc, lr @ jump to next instruction & switch modes. 366 .endm 367 368 .macro get_irq_stack @ setup IRQ stack 369 ldr sp, IRQ_STACK_START 370 .endm 371 372 .macro get_fiq_stack @ setup FIQ stack 373 ldr sp, FIQ_STACK_START 374 .endm 375 376/* 377 * exception handlers 378 */ 379 .align 5 380undefined_instruction: 381 get_bad_stack 382 bad_save_user_regs 383 bl do_undefined_instruction 384 385 .align 5 386software_interrupt: 387 get_bad_stack 388 bad_save_user_regs 389 bl do_software_interrupt 390 391 .align 5 392prefetch_abort: 393 get_bad_stack 394 bad_save_user_regs 395 bl do_prefetch_abort 396 397 .align 5 398data_abort: 399 get_bad_stack 400 bad_save_user_regs 401 bl do_data_abort 402 403 .align 5 404not_used: 405 get_bad_stack 406 bad_save_user_regs 407 bl do_not_used 408 409#ifdef CONFIG_USE_IRQ 410 411 .align 5 412irq: 413 get_irq_stack 414 irq_save_user_regs 415 bl do_irq 416 irq_restore_user_regs 417 418 .align 5 419fiq: 420 get_fiq_stack 421 /* someone ought to write a more effiction fiq_save_user_regs */ 422 irq_save_user_regs 423 bl do_fiq 424 irq_restore_user_regs 425 426#else 427 428 .align 5 429irq: 430 get_bad_stack 431 bad_save_user_regs 432 bl do_irq 433 434 .align 5 435fiq: 436 get_bad_stack 437 bad_save_user_regs 438 bl do_fiq 439 440#endif 441 442# ifdef CONFIG_INTEGRATOR 443 444 /* Satisfied by general board level routine */ 445 446#else 447 448 .align 5 449.globl reset_cpu 450reset_cpu: 451 452 ldr r1, rstctl1 /* get clkm1 reset ctl */ 453 mov r3, #0x0 454 strh r3, [r1] /* clear it */ 455 mov r3, #0x8 456 strh r3, [r1] /* force dsp+arm reset */ 457_loop_forever: 458 b _loop_forever 459 460rstctl1: 461 .word 0xfffece10 462 463#endif /* #ifdef CONFIG_INTEGRATOR */ 464