1/* 2 * armboot - Startup Code for ARM926EJS CPU-core 3 * 4 * Copyright (c) 2003 Texas Instruments 5 * 6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 7 * 8 * Copyright (c) 2001 Marius Gr�ger <mag@sysgo.de> 9 * Copyright (c) 2002 Alex Z�pke <azu@sysgo.de> 10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 12 * Copyright (c) 2003 Kshitij <kshitij@ti.com> 13 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr> 14 * 15 * See file CREDITS for list of people who contributed to this 16 * project. 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License as 20 * published by the Free Software Foundation; either version 2 of 21 * the License, or (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 31 * MA 02111-1307 USA 32 */ 33 34#include <asm-offsets.h> 35#include <config.h> 36#include <common.h> 37#include <version.h> 38 39#if defined(CONFIG_OMAP1610) 40#include <./configs/omap1510.h> 41#elif defined(CONFIG_OMAP730) 42#include <./configs/omap730.h> 43#endif 44 45/* 46 ************************************************************************* 47 * 48 * Jump vector table as in table 3.1 in [1] 49 * 50 ************************************************************************* 51 */ 52 53 54.globl _start 55_start: 56 b reset 57#ifdef CONFIG_PRELOADER 58/* No exception handlers in preloader */ 59 ldr pc, _hang 60 ldr pc, _hang 61 ldr pc, _hang 62 ldr pc, _hang 63 ldr pc, _hang 64 ldr pc, _hang 65 ldr pc, _hang 66 67_hang: 68 .word do_hang 69/* pad to 64 byte boundary */ 70 .word 0x12345678 71 .word 0x12345678 72 .word 0x12345678 73 .word 0x12345678 74 .word 0x12345678 75 .word 0x12345678 76 .word 0x12345678 77#else 78 ldr pc, _undefined_instruction 79 ldr pc, _software_interrupt 80 ldr pc, _prefetch_abort 81 ldr pc, _data_abort 82 ldr pc, _not_used 83 ldr pc, _irq 84 ldr pc, _fiq 85 86_undefined_instruction: 87 .word undefined_instruction 88_software_interrupt: 89 .word software_interrupt 90_prefetch_abort: 91 .word prefetch_abort 92_data_abort: 93 .word data_abort 94_not_used: 95 .word not_used 96_irq: 97 .word irq 98_fiq: 99 .word fiq 100 101#endif /* CONFIG_PRELOADER */ 102 .balignl 16,0xdeadbeef 103 104 105/* 106 ************************************************************************* 107 * 108 * Startup Code (reset vector) 109 * 110 * do important init only if we don't start from memory! 111 * setup Memory and board specific bits prior to relocation. 112 * relocate armboot to ram 113 * setup stack 114 * 115 ************************************************************************* 116 */ 117 118.globl _TEXT_BASE 119_TEXT_BASE: 120 .word CONFIG_SYS_TEXT_BASE 121 122/* 123 * These are defined in the board-specific linker script. 124 * Subtracting _start from them lets the linker put their 125 * relative position in the executable instead of leaving 126 * them null. 127 */ 128.globl _bss_start_ofs 129_bss_start_ofs: 130 .word __bss_start - _start 131 132.globl _bss_end_ofs 133_bss_end_ofs: 134 .word _end - _start 135 136#ifdef CONFIG_USE_IRQ 137/* IRQ stack memory (calculated at run-time) */ 138.globl IRQ_STACK_START 139IRQ_STACK_START: 140 .word 0x0badc0de 141 142/* IRQ stack memory (calculated at run-time) */ 143.globl FIQ_STACK_START 144FIQ_STACK_START: 145 .word 0x0badc0de 146#endif 147 148#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) 149/* IRQ stack memory (calculated at run-time) + 8 bytes */ 150.globl IRQ_STACK_START_IN 151IRQ_STACK_START_IN: 152 .word 0x0badc0de 153 154/* 155 * the actual reset code 156 */ 157 158reset: 159 /* 160 * set the cpu to SVC32 mode 161 */ 162 mrs r0,cpsr 163 bic r0,r0,#0x1f 164 orr r0,r0,#0xd3 165 msr cpsr,r0 166 167 /* 168 * we do sys-critical inits only at reboot, 169 * not when booting from ram! 170 */ 171#ifndef CONFIG_SKIP_LOWLEVEL_INIT 172 bl cpu_init_crit 173#endif 174 175/* Set stackpointer in internal RAM to call board_init_f */ 176call_board_init_f: 177 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 178 ldr r0,=0x00000000 179 bl board_init_f 180 181/*------------------------------------------------------------------------------*/ 182 183/* 184 * void relocate_code (addr_sp, gd, addr_moni) 185 * 186 * This "function" does not return, instead it continues in RAM 187 * after relocating the monitor code. 188 * 189 */ 190 .globl relocate_code 191relocate_code: 192 mov r4, r0 /* save addr_sp */ 193 mov r5, r1 /* save addr of gd */ 194 mov r6, r2 /* save addr of destination */ 195 mov r7, r2 /* save addr of destination */ 196 197 /* Set up the stack */ 198stack_setup: 199 mov sp, r4 200 201 adr r0, _start 202 ldr r2, _TEXT_BASE 203 ldr r3, _bss_start_ofs 204 add r2, r0, r3 /* r2 <- source end address */ 205 cmp r0, r6 206 beq clear_bss 207 208#ifndef CONFIG_SKIP_RELOCATE_UBOOT 209copy_loop: 210 ldmia r0!, {r9-r10} /* copy from source address [r0] */ 211 stmia r6!, {r9-r10} /* copy to target address [r1] */ 212 cmp r0, r2 /* until source end address [r2] */ 213 blo copy_loop 214 215#ifndef CONFIG_PRELOADER 216 /* 217 * fix .rel.dyn relocations 218 */ 219 ldr r0, _TEXT_BASE /* r0 <- Text base */ 220 sub r9, r7, r0 /* r9 <- relocation offset */ 221 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 222 add r10, r10, r0 /* r10 <- sym table in FLASH */ 223 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 224 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 225 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 226 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 227fixloop: 228 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 229 add r0, r0, r9 /* r0 <- location to fix up in RAM */ 230 ldr r1, [r2, #4] 231 and r8, r1, #0xff 232 cmp r8, #23 /* relative fixup? */ 233 beq fixrel 234 cmp r8, #2 /* absolute fixup? */ 235 beq fixabs 236 /* ignore unknown type of fixup */ 237 b fixnext 238fixabs: 239 /* absolute fix: set location to (offset) symbol value */ 240 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 241 add r1, r10, r1 /* r1 <- address of symbol in table */ 242 ldr r1, [r1, #4] /* r1 <- symbol value */ 243 add r1, r9 /* r1 <- relocated sym addr */ 244 b fixnext 245fixrel: 246 /* relative fix: increase location by offset */ 247 ldr r1, [r0] 248 add r1, r1, r9 249fixnext: 250 str r1, [r0] 251 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 252 cmp r2, r3 253 blo fixloop 254#endif 255#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ 256 257clear_bss: 258#ifndef CONFIG_PRELOADER 259 ldr r0, _bss_start_ofs 260 ldr r1, _bss_end_ofs 261 ldr r3, _TEXT_BASE /* Text base */ 262 mov r4, r7 /* reloc addr */ 263 add r0, r0, r4 264 add r1, r1, r4 265 mov r2, #0x00000000 /* clear */ 266 267clbss_l:str r2, [r0] /* clear loop... */ 268 add r0, r0, #4 269 cmp r0, r1 270 bne clbss_l 271 272 bl coloured_LED_init 273 bl red_LED_on 274#endif 275 276/* 277 * We are done. Do not return, instead branch to second part of board 278 * initialization, now running from RAM. 279 */ 280#ifdef CONFIG_NAND_SPL 281 ldr r0, _nand_boot_ofs 282 mov pc, r0 283 284_nand_boot_ofs: 285 .word nand_boot 286#else 287 ldr r0, _board_init_r_ofs 288 adr r1, _start 289 add lr, r0, r1 290#ifndef CONFIG_SKIP_RELOCATE_UBOOT 291 add lr, lr, r9 292#endif 293 /* setup parameters for board_init_r */ 294 mov r0, r5 /* gd_t */ 295 mov r1, r7 /* dest_addr */ 296 /* jump to it ... */ 297 mov pc, lr 298 299_board_init_r_ofs: 300 .word board_init_r - _start 301#endif 302 303_rel_dyn_start_ofs: 304 .word __rel_dyn_start - _start 305_rel_dyn_end_ofs: 306 .word __rel_dyn_end - _start 307_dynsym_start_ofs: 308 .word __dynsym_start - _start 309 310#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ 311/* 312 * the actual reset code 313 */ 314 315reset: 316 /* 317 * set the cpu to SVC32 mode 318 */ 319 mrs r0,cpsr 320 bic r0,r0,#0x1f 321 orr r0,r0,#0xd3 322 msr cpsr,r0 323 324 /* 325 * we do sys-critical inits only at reboot, 326 * not when booting from ram! 327 */ 328#ifndef CONFIG_SKIP_LOWLEVEL_INIT 329 bl cpu_init_crit 330#endif 331 332#ifndef CONFIG_SKIP_RELOCATE_UBOOT 333relocate: /* relocate U-Boot to RAM */ 334 adr r0, _start /* r0 <- current position of code */ 335 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ 336 cmp r0, r1 /* don't reloc during debug */ 337 beq stack_setup 338 ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */ 339 add r2, r0, r3 /* r2 <- source end address */ 340 341copy_loop: 342 ldmia r0!, {r3-r10} /* copy from source address [r0] */ 343 stmia r1!, {r3-r10} /* copy to target address [r1] */ 344 cmp r0, r2 /* until source end address [r2] */ 345 blo copy_loop 346#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ 347 348 /* Set up the stack */ 349stack_setup: 350 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ 351 sub sp, r0, #128 /* leave 32 words for abort-stack */ 352#ifndef CONFIG_PRELOADER 353 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ 354 sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ 355#ifdef CONFIG_USE_IRQ 356 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) 357#endif 358#endif /* CONFIG_PRELOADER */ 359 sub sp, r0, #12 /* leave 3 words for abort-stack */ 360 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 361 362clear_bss: 363 adr r2, _start 364 ldr r0, _bss_start_ofs /* find start of bss segment */ 365 add r0, r0, r2 366 ldr r1, _bss_end_ofs /* stop here */ 367 add r1, r1, r2 368 mov r2, #0x00000000 /* clear */ 369 370#ifndef CONFIG_PRELOADER 371clbss_l:str r2, [r0] /* clear loop... */ 372 add r0, r0, #4 373 cmp r0, r1 374 blo clbss_l 375 376 bl coloured_LED_init 377 bl red_LED_on 378#endif /* CONFIG_PRELOADER */ 379 380 ldr r0, _start_armboot_ofs 381 adr r1, _start 382 add r0, r0, r1 383 ldr pc, r0 384 385_start_armboot_ofs: 386#ifdef CONFIG_NAND_SPL 387 .word nand_boot - _start 388#else 389 .word start_armboot - _start 390#endif /* CONFIG_NAND_SPL */ 391#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ 392 393/* 394 ************************************************************************* 395 * 396 * CPU_init_critical registers 397 * 398 * setup important registers 399 * setup memory timing 400 * 401 ************************************************************************* 402 */ 403#ifndef CONFIG_SKIP_LOWLEVEL_INIT 404cpu_init_crit: 405 /* 406 * flush v4 I/D caches 407 */ 408 mov r0, #0 409 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ 410 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ 411 412 /* 413 * disable MMU stuff and caches 414 */ 415 mrc p15, 0, r0, c1, c0, 0 416 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */ 417 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */ 418 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */ 419 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */ 420 mcr p15, 0, r0, c1, c0, 0 421 422 /* 423 * Go setup Memory and board specific bits prior to relocation. 424 */ 425 mov ip, lr /* perserve link reg across call */ 426 bl lowlevel_init /* go setup pll,mux,memory */ 427 mov lr, ip /* restore link */ 428 mov pc, lr /* back to my caller */ 429#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 430 431#ifndef CONFIG_PRELOADER 432/* 433 ************************************************************************* 434 * 435 * Interrupt handling 436 * 437 ************************************************************************* 438 */ 439 440@ 441@ IRQ stack frame. 442@ 443#define S_FRAME_SIZE 72 444 445#define S_OLD_R0 68 446#define S_PSR 64 447#define S_PC 60 448#define S_LR 56 449#define S_SP 52 450 451#define S_IP 48 452#define S_FP 44 453#define S_R10 40 454#define S_R9 36 455#define S_R8 32 456#define S_R7 28 457#define S_R6 24 458#define S_R5 20 459#define S_R4 16 460#define S_R3 12 461#define S_R2 8 462#define S_R1 4 463#define S_R0 0 464 465#define MODE_SVC 0x13 466#define I_BIT 0x80 467 468/* 469 * use bad_save_user_regs for abort/prefetch/undef/swi ... 470 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 471 */ 472 473 .macro bad_save_user_regs 474 @ carve out a frame on current user stack 475 sub sp, sp, #S_FRAME_SIZE 476 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 477#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) 478 adr r2, _start 479 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) 480 sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack 481#else 482 ldr r2, IRQ_STACK_START_IN 483#endif 484 @ get values for "aborted" pc and cpsr (into parm regs) 485 ldmia r2, {r2 - r3} 486 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 487 add r5, sp, #S_SP 488 mov r1, lr 489 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 490 mov r0, sp @ save current stack into r0 (param register) 491 .endm 492 493 .macro irq_save_user_regs 494 sub sp, sp, #S_FRAME_SIZE 495 stmia sp, {r0 - r12} @ Calling r0-r12 496 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 497 add r8, sp, #S_PC 498 stmdb r8, {sp, lr}^ @ Calling SP, LR 499 str lr, [r8, #0] @ Save calling PC 500 mrs r6, spsr 501 str r6, [r8, #4] @ Save CPSR 502 str r0, [r8, #8] @ Save OLD_R0 503 mov r0, sp 504 .endm 505 506 .macro irq_restore_user_regs 507 ldmia sp, {r0 - lr}^ @ Calling r0 - lr 508 mov r0, r0 509 ldr lr, [sp, #S_PC] @ Get PC 510 add sp, sp, #S_FRAME_SIZE 511 subs pc, lr, #4 @ return & move spsr_svc into cpsr 512 .endm 513 514 .macro get_bad_stack 515#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) 516 adr r13, _start @ setup our mode stack 517 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) 518 sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack 519#else 520 ldr r13, IRQ_STACK_START_IN @ setup our mode stack 521#endif 522 523 str lr, [r13] @ save caller lr in position 0 of saved stack 524 mrs lr, spsr @ get the spsr 525 str lr, [r13, #4] @ save spsr in position 1 of saved stack 526 mov r13, #MODE_SVC @ prepare SVC-Mode 527 @ msr spsr_c, r13 528 msr spsr, r13 @ switch modes, make sure moves will execute 529 mov lr, pc @ capture return pc 530 movs pc, lr @ jump to next instruction & switch modes. 531 .endm 532 533 .macro get_irq_stack @ setup IRQ stack 534 ldr sp, IRQ_STACK_START 535 .endm 536 537 .macro get_fiq_stack @ setup FIQ stack 538 ldr sp, FIQ_STACK_START 539 .endm 540#endif /* CONFIG_PRELOADER */ 541 542/* 543 * exception handlers 544 */ 545#ifdef CONFIG_PRELOADER 546 .align 5 547do_hang: 548 ldr sp, _TEXT_BASE /* switch to abort stack */ 5491: 550 bl 1b /* hang and never return */ 551#else /* !CONFIG_PRELOADER */ 552 .align 5 553undefined_instruction: 554 get_bad_stack 555 bad_save_user_regs 556 bl do_undefined_instruction 557 558 .align 5 559software_interrupt: 560 get_bad_stack 561 bad_save_user_regs 562 bl do_software_interrupt 563 564 .align 5 565prefetch_abort: 566 get_bad_stack 567 bad_save_user_regs 568 bl do_prefetch_abort 569 570 .align 5 571data_abort: 572 get_bad_stack 573 bad_save_user_regs 574 bl do_data_abort 575 576 .align 5 577not_used: 578 get_bad_stack 579 bad_save_user_regs 580 bl do_not_used 581 582#ifdef CONFIG_USE_IRQ 583 584 .align 5 585irq: 586 get_irq_stack 587 irq_save_user_regs 588 bl do_irq 589 irq_restore_user_regs 590 591 .align 5 592fiq: 593 get_fiq_stack 594 /* someone ought to write a more effiction fiq_save_user_regs */ 595 irq_save_user_regs 596 bl do_fiq 597 irq_restore_user_regs 598 599#else 600 601 .align 5 602irq: 603 get_bad_stack 604 bad_save_user_regs 605 bl do_irq 606 607 .align 5 608fiq: 609 get_bad_stack 610 bad_save_user_regs 611 bl do_fiq 612 613#endif 614#endif /* CONFIG_PRELOADER */ 615