1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a47a12beSStefan Roese /*
3a47a12beSStefan Roese * (C) Copyright 2007 Semihalf
4a47a12beSStefan Roese *
5a47a12beSStefan Roese * Written by: Rafal Jaworowski <raj@semihalf.com>
6a47a12beSStefan Roese *
7a47a12beSStefan Roese * This file contains routines that fetch data from PowerPC-dependent sources
8a47a12beSStefan Roese * (bd_info etc.)
9a47a12beSStefan Roese */
10a47a12beSStefan Roese
11a47a12beSStefan Roese #include <config.h>
12a47a12beSStefan Roese #include <linux/types.h>
13a47a12beSStefan Roese #include <api_public.h>
14a47a12beSStefan Roese
15a47a12beSStefan Roese #include <asm/u-boot.h>
16a47a12beSStefan Roese #include <asm/global_data.h>
17a47a12beSStefan Roese
18a47a12beSStefan Roese #include "api_private.h"
19a47a12beSStefan Roese
20a47a12beSStefan Roese DECLARE_GLOBAL_DATA_PTR;
21a47a12beSStefan Roese
22a47a12beSStefan Roese /*
23a47a12beSStefan Roese * Important notice: handling of individual fields MUST be kept in sync with
24a47a12beSStefan Roese * include/asm-ppc/u-boot.h and include/asm-ppc/global_data.h, so any changes
25a47a12beSStefan Roese * need to reflect their current state and layout of structures involved!
26a47a12beSStefan Roese */
platform_sys_info(struct sys_info * si)27a47a12beSStefan Roese int platform_sys_info(struct sys_info *si)
28a47a12beSStefan Roese {
29a47a12beSStefan Roese si->clk_bus = gd->bus_clk;
30a47a12beSStefan Roese si->clk_cpu = gd->cpu_clk;
31a47a12beSStefan Roese
32ee1e600cSChristophe Leroy #if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
33a47a12beSStefan Roese #define bi_bar bi_immr_base
34a47a12beSStefan Roese #elif defined(CONFIG_MPC83xx)
35a47a12beSStefan Roese #define bi_bar bi_immrbar
36a47a12beSStefan Roese #endif
37a47a12beSStefan Roese
38a47a12beSStefan Roese #if defined(bi_bar)
39a47a12beSStefan Roese si->bar = gd->bd->bi_bar;
40a47a12beSStefan Roese #undef bi_bar
41a47a12beSStefan Roese #else
42a47a12beSStefan Roese si->bar = 0;
43a47a12beSStefan Roese #endif
44a47a12beSStefan Roese
45a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_memstart, gd->bd->bi_memsize, MR_ATTR_DRAM);
46a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_flashstart, gd->bd->bi_flashsize, MR_ATTR_FLASH);
47a47a12beSStefan Roese platform_set_mr(si, gd->bd->bi_sramstart, gd->bd->bi_sramsize, MR_ATTR_SRAM);
48a47a12beSStefan Roese
49a47a12beSStefan Roese return 1;
50a47a12beSStefan Roese }
51