1# Trace events for debugging and performance instrumentation 2# 3# This file is processed by the tracetool script during the build. 4# 5# To add a new trace event: 6# 7# 1. Choose a name for the trace event. Declare its arguments and format 8# string. 9# 10# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> 11# trace_multiwrite_cb(). The source file must #include "trace.h". 12# 13# Format of a trace event: 14# 15# [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" 16# 17# Example: qemu_malloc(size_t size) "size %zu" 18# 19# The "disable" keyword will build without the trace event. 20# In case of 'simple' trace backend, it will allow the trace event to be 21# compiled, but this would be turned off by default. It can be toggled on via 22# the monitor. 23# 24# The <name> must be a valid as a C function name. 25# 26# Types should be standard C types. Use void * for pointers because the trace 27# system may not have the necessary headers included. 28# 29# The <format-string> should be a sprintf()-compatible format string. 30 31# qemu-malloc.c 32disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p" 33disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" 34disable qemu_free(void *ptr) "ptr %p" 35 36# osdep.c 37disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" 38disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" 39disable qemu_vfree(void *ptr) "ptr %p" 40 41# hw/virtio.c 42disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" 43disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" 44disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" 45disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" 46disable virtio_irq(void *vq) "vq %p" 47disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p" 48 49# block.c 50disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" 51disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" 52disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" 53disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" 54disable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" 55disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 56disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" 57 58# hw/virtio-blk.c 59disable virtio_blk_req_complete(void *req, int status) "req %p status %d" 60disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" 61disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" 62 63# posix-aio-compat.c 64disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" 65disable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" 66disable paio_cancel(void *acb, void *opaque) "acb %p opaque %p" 67 68# ioport.c 69disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" 70disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" 71 72# balloon.c 73# Since requests are raised via monitor, not many tracepoints are needed. 74disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" 75 76# hw/apic.c 77disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" 78disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" 79disable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" 80disable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" 81disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 82disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" 83# coalescing 84disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" 85disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" 86disable apic_set_irq(int apic_irq_delivered) "coalescing %d" 87 88# hw/cs4231.c 89disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" 90disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" 91disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" 92disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" 93 94# hw/eccmemctl.c 95disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" 96disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" 97disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" 98disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" 99disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" 100disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" 101disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" 102disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" 103disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" 104disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" 105disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" 106disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" 107disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" 108disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" 109disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" 110disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" 111disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" 112disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" 113 114# hw/lance.c 115disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" 116disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" 117 118# hw/slavio_intctl.c 119disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" 120disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" 121disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" 122disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" 123disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" 124disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" 125disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" 126disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" 127disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" 128disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" 129disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" 130disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" 131 132# hw/slavio_misc.c 133disable slavio_misc_update_irq_raise(void) "Raise IRQ" 134disable slavio_misc_update_irq_lower(void) "Lower IRQ" 135disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" 136disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" 137disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" 138disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" 139disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" 140disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" 141disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" 142disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" 143disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" 144disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" 145disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" 146disable apc_mem_writeb(uint32_t val) "Write power management %02x" 147disable apc_mem_readb(uint32_t ret) "Read power management %02x" 148disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" 149disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" 150disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" 151disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" 152 153# hw/slavio_timer.c 154disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" 155disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" 156disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" 157disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" 158disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" 159disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" 160disable slavio_timer_mem_writel_counter_invalid(void) "not user timer" 161disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" 162disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" 163disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" 164disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" 165disable slavio_timer_mem_writel_mode_invalid(void) "not system timer" 166disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" 167 168# hw/sparc32_dma.c 169disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" 170disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" 171disable sparc32_dma_set_irq_raise(void) "Raise IRQ" 172disable sparc32_dma_set_irq_lower(void) "Lower IRQ" 173disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 174disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 175disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 176disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 177disable sparc32_dma_enable_raise(void) "Raise DMA enable" 178disable sparc32_dma_enable_lower(void) "Lower DMA enable" 179 180# hw/sun4m.c 181disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" 182disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" 183disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" 184disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" 185 186# hw/sun4m_iommu.c 187disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 188disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 189disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" 190disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 191disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 192disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 193disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 194disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" 195 196# hw/usb-desc.c 197disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" 198disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" 199disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 200disable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" 201disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" 202disable usb_set_addr(int addr) "dev %d" 203disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" 204disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 205disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" 206 207# vl.c 208disable vm_state_notify(int running, int reason) "running %d reason %d" 209 210# block/qed-l2-cache.c 211disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" 212disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" 213disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" 214 215# block/qed-table.c 216disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" 217disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" 218disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" 219disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" 220 221# block/qed.c 222disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" 223disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" 224disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" 225disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 226disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 227disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 228disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" 229disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" 230 231# hw/grlib_gptimer.c 232disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" 233disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" 234disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" 235disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" 236disable grlib_gptimer_hit(int id) "timer:%d HIT" 237disable grlib_gptimer_readl(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" 238disable grlib_gptimer_writel(int id, const char *s, uint32_t val) "timer:%d %s 0x%x" 239disable grlib_gptimer_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 240 241# hw/grlib_irqmp.c 242disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n" 243disable grlib_irqmp_ack(int intno) "interrupt:%d" 244disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" 245disable grlib_irqmp_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 246 247# hw/grlib_apbuart.c 248disable grlib_apbuart_event(int event) "event:%d" 249disable grlib_apbuart_unknown_register(const char *op, uint64_t val) "%s unknown register 0x%"PRIx64"" 250 251# hw/leon3.c 252disable leon3_set_irq(int intno) "Set CPU IRQ %d" 253disable leon3_reset_irq(int intno) "Reset CPU IRQ %d" 254 255# spice-qemu-char.c 256disable spice_vmc_write(ssize_t out, int len) "spice wrottn %lu of requested %zd" 257disable spice_vmc_read(int bytes, int len) "spice read %lu of requested %zd" 258disable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" 259disable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" 260 261# hw/lm32_pic.c 262disable lm32_pic_raise_irq(void) "Raise CPU interrupt" 263disable lm32_pic_lower_irq(void) "Lower CPU interrupt" 264disable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" 265disable lm32_pic_set_im(uint32_t im) "im 0x%08x" 266disable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" 267disable lm32_pic_get_im(uint32_t im) "im 0x%08x" 268disable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" 269 270# hw/lm32_juart.c 271disable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" 272disable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" 273disable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" 274disable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" 275 276# hw/lm32_timer.c 277disable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 278disable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 279disable lm32_timer_hit(void) "timer hit" 280disable lm32_timer_irq_state(int level) "irq state %d" 281 282# hw/lm32_uart.c 283disable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 284disable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 285disable lm32_uart_irq_state(int level) "irq state %d" 286 287# hw/lm32_sys.c 288disable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" 289 290# hw/milkymist-ac97.c 291disable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 292disable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 293disable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" 294disable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" 295disable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" 296disable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" 297disable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" 298disable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" 299disable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" 300disable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" 301 302# hw/milkymist-hpdmc.c 303disable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 304disable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" 305 306# hw/milkymist-memcard.c 307disable milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 308disable milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 309 310# hw/milkymist-minimac.c 311disable milkymist_minimac_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 312disable milkymist_minimac_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 313disable milkymist_minimac_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 314disable milkymist_minimac_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" 315disable milkymist_minimac_tx_frame(uint32_t length) "length %u" 316disable milkymist_minimac_rx_frame(const void *buf, uint32_t length) "buf %p length %u" 317disable milkymist_minimac_drop_rx_frame(const void *buf) "buf %p" 318disable milkymist_minimac_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" 319disable milkymist_minimac_pulse_irq_rx(void) "Pulse IRQ RX" 320disable milkymist_minimac_pulse_irq_tx(void) "Pulse IRQ TX" 321 322# hw/milkymist-pfpu.c 323disable milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 324disable milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 325disable milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" 326disable milkymist_pfpu_pulse_irq(void) "Pulse IRQ" 327 328# hw/milkymist-softusb.c 329disable milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 330disable milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 331disable milkymist_softusb_mevt(uint8_t m) "m %d" 332disable milkymist_softusb_kevt(uint8_t m) "m %d" 333disable milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" 334disable milkymist_softusb_pulse_irq(void) "Pulse IRQ" 335 336# hw/milkymist-sysctl.c 337disable milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 338disable milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 339disable milkymist_sysctl_icap_write(uint32_t value) "value %08x" 340disable milkymist_sysctl_start_timer0(void) "Start timer0" 341disable milkymist_sysctl_stop_timer0(void) "Stop timer0" 342disable milkymist_sysctl_start_timer1(void) "Start timer1" 343disable milkymist_sysctl_stop_timer1(void) "Stop timer1" 344disable milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" 345disable milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" 346 347# hw/milkymist-tmu2.c 348disable milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 349disable milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 350disable milkymist_tmu2_start(void) "Start TMU" 351disable milkymist_tmu2_pulse_irq(void) "Pulse IRQ" 352 353# hw/milkymist-uart.c 354disable milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 355disable milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 356disable milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX" 357disable milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX" 358 359# hw/milkymist-vgafb.c 360disable milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" 361disable milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" 362