xref: /openbmc/qemu/tests/tcg/xtensa/fpu.h (revision 44423107e7b5731ef40c5c8632a5bad8b49d0838)
1*e95ef431SMax Filippov #if XCHAL_HAVE_DFP || XCHAL_HAVE_FP_DIV
2*e95ef431SMax Filippov #define DFPU 1
3*e95ef431SMax Filippov #else
4*e95ef431SMax Filippov #define DFPU 0
5*e95ef431SMax Filippov #endif
6*e95ef431SMax Filippov 
7*e95ef431SMax Filippov #define FCR_RM_NEAREST 0
8*e95ef431SMax Filippov #define FCR_RM_TRUNC   1
9*e95ef431SMax Filippov #define FCR_RM_CEIL    2
10*e95ef431SMax Filippov #define FCR_RM_FLOOR   3
11*e95ef431SMax Filippov 
12*e95ef431SMax Filippov #define FSR__ 0x00000000
13*e95ef431SMax Filippov #define FSR_I 0x00000080
14*e95ef431SMax Filippov #define FSR_U 0x00000100
15*e95ef431SMax Filippov #define FSR_O 0x00000200
16*e95ef431SMax Filippov #define FSR_Z 0x00000400
17*e95ef431SMax Filippov #define FSR_V 0x00000800
18*e95ef431SMax Filippov 
19*e95ef431SMax Filippov #define FSR_UI (FSR_U | FSR_I)
20*e95ef431SMax Filippov #define FSR_OI (FSR_O | FSR_I)
21*e95ef431SMax Filippov 
22*e95ef431SMax Filippov #define F32_0           0x00000000
23*e95ef431SMax Filippov #define F32_0_5         0x3f000000
24*e95ef431SMax Filippov #define F32_1           0x3f800000
25*e95ef431SMax Filippov #define F32_MAX         0x7f7fffff
26*e95ef431SMax Filippov #define F32_PINF        0x7f800000
27*e95ef431SMax Filippov #define F32_NINF        0xff800000
28*e95ef431SMax Filippov 
29*e95ef431SMax Filippov #define F32_DNAN        0x7fc00000
30*e95ef431SMax Filippov #define F32_SNAN(v)     (0x7f800000 | (v))
31*e95ef431SMax Filippov #define F32_QNAN(v)     (0x7fc00000 | (v))
32*e95ef431SMax Filippov 
33*e95ef431SMax Filippov #define F32_MINUS       0x80000000
34*e95ef431SMax Filippov 
35*e95ef431SMax Filippov #define F64_0           0x0000000000000000
36*e95ef431SMax Filippov #define F64_MIN_NORM    0x0010000000000000
37*e95ef431SMax Filippov #define F64_1           0x3ff0000000000000
38*e95ef431SMax Filippov #define F64_MAX_2       0x7fe0000000000000
39*e95ef431SMax Filippov #define F64_MAX         0x7fefffffffffffff
40*e95ef431SMax Filippov #define F64_PINF        0x7ff0000000000000
41*e95ef431SMax Filippov #define F64_NINF        0xfff0000000000000
42*e95ef431SMax Filippov 
43*e95ef431SMax Filippov #define F64_DNAN        0x7ff8000000000000
44*e95ef431SMax Filippov #define F64_SNAN(v)     (0x7ff0000000000000 | (v))
45*e95ef431SMax Filippov #define F64_QNAN(v)     (0x7ff8000000000000 | (v))
46*e95ef431SMax Filippov 
47*e95ef431SMax Filippov #define F64_MINUS       0x8000000000000000
48*e95ef431SMax Filippov 
49*e95ef431SMax Filippov .macro test_op1_rm op, fr0, fr1, v0, r, sr
50*e95ef431SMax Filippov     movi    a2, 0
51*e95ef431SMax Filippov     wur     a2, fsr
52*e95ef431SMax Filippov     movfp   \fr0, \v0
53*e95ef431SMax Filippov     \op     \fr1, \fr0
54*e95ef431SMax Filippov     check_res \fr1, \r, \sr
55*e95ef431SMax Filippov .endm
56*e95ef431SMax Filippov 
57*e95ef431SMax Filippov .macro test_op2_rm op, fr0, fr1, fr2, v0, v1, r, sr
58*e95ef431SMax Filippov     movi    a2, 0
59*e95ef431SMax Filippov     wur     a2, fsr
60*e95ef431SMax Filippov     movfp   \fr0, \v0
61*e95ef431SMax Filippov     movfp   \fr1, \v1
62*e95ef431SMax Filippov     \op     \fr2, \fr0, \fr1
63*e95ef431SMax Filippov     check_res \fr2, \r, \sr
64*e95ef431SMax Filippov .endm
65*e95ef431SMax Filippov 
66*e95ef431SMax Filippov .macro test_op3_rm op, fr0, fr1, fr2, fr3, v0, v1, v2, r, sr
67*e95ef431SMax Filippov     movi    a2, 0
68*e95ef431SMax Filippov     wur     a2, fsr
69*e95ef431SMax Filippov     movfp   \fr0, \v0
70*e95ef431SMax Filippov     movfp   \fr1, \v1
71*e95ef431SMax Filippov     movfp   \fr2, \v2
72*e95ef431SMax Filippov     \op     \fr0, \fr1, \fr2
73*e95ef431SMax Filippov     check_res \fr3, \r, \sr
74*e95ef431SMax Filippov .endm
75*e95ef431SMax Filippov 
76*e95ef431SMax Filippov .macro test_op1_ex op, fr0, fr1, v0, rm, r, sr
77*e95ef431SMax Filippov     movi    a2, \rm
78*e95ef431SMax Filippov     wur     a2, fcr
79*e95ef431SMax Filippov     test_op1_rm \op, \fr0, \fr1, \v0, \r, \sr
80*e95ef431SMax Filippov     movi    a2, (\rm) | 0x7c
81*e95ef431SMax Filippov     wur     a2, fcr
82*e95ef431SMax Filippov     test_op1_rm \op, \fr0, \fr1, \v0, \r, \sr
83*e95ef431SMax Filippov .endm
84*e95ef431SMax Filippov 
85*e95ef431SMax Filippov .macro test_op2_ex op, fr0, fr1, fr2, v0, v1, rm, r, sr
86*e95ef431SMax Filippov     movi    a2, \rm
87*e95ef431SMax Filippov     wur     a2, fcr
88*e95ef431SMax Filippov     test_op2_rm \op, \fr0, \fr1, \fr2, \v0, \v1, \r, \sr
89*e95ef431SMax Filippov     movi    a2, (\rm) | 0x7c
90*e95ef431SMax Filippov     wur     a2, fcr
91*e95ef431SMax Filippov     test_op2_rm \op, \fr0, \fr1, \fr2, \v0, \v1, \r, \sr
92*e95ef431SMax Filippov .endm
93*e95ef431SMax Filippov 
94*e95ef431SMax Filippov .macro test_op3_ex op, fr0, fr1, fr2, fr3, v0, v1, v2, rm, r, sr
95*e95ef431SMax Filippov     movi    a2, \rm
96*e95ef431SMax Filippov     wur     a2, fcr
97*e95ef431SMax Filippov     test_op3_rm \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, \r, \sr
98*e95ef431SMax Filippov     movi    a2, (\rm) | 0x7c
99*e95ef431SMax Filippov     wur     a2, fcr
100*e95ef431SMax Filippov     test_op3_rm \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, \r, \sr
101*e95ef431SMax Filippov .endm
102*e95ef431SMax Filippov 
103*e95ef431SMax Filippov .macro test_op1 op, fr0, fr1, v0, r0, r1, r2, r3, sr0, sr1, sr2, sr3
104*e95ef431SMax Filippov     test_op1_ex \op, \fr0, \fr1, \v0, 0, \r0, \sr0
105*e95ef431SMax Filippov     test_op1_ex \op, \fr0, \fr1, \v0, 1, \r1, \sr1
106*e95ef431SMax Filippov     test_op1_ex \op, \fr0, \fr1, \v0, 2, \r2, \sr2
107*e95ef431SMax Filippov     test_op1_ex \op, \fr0, \fr1, \v0, 3, \r3, \sr3
108*e95ef431SMax Filippov .endm
109*e95ef431SMax Filippov 
110*e95ef431SMax Filippov .macro test_op2 op, fr0, fr1, fr2, v0, v1, r0, r1, r2, r3, sr0, sr1, sr2, sr3
111*e95ef431SMax Filippov     test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 0, \r0, \sr0
112*e95ef431SMax Filippov     test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 1, \r1, \sr1
113*e95ef431SMax Filippov     test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 2, \r2, \sr2
114*e95ef431SMax Filippov     test_op2_ex \op, \fr0, \fr1, \fr2, \v0, \v1, 3, \r3, \sr3
115*e95ef431SMax Filippov .endm
116*e95ef431SMax Filippov 
117*e95ef431SMax Filippov .macro test_op3 op, fr0, fr1, fr2, fr3, v0, v1, v2, r0, r1, r2, r3, sr0, sr1, sr2, sr3
118*e95ef431SMax Filippov     test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 0, \r0, \sr0
119*e95ef431SMax Filippov     test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 1, \r1, \sr1
120*e95ef431SMax Filippov     test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 2, \r2, \sr2
121*e95ef431SMax Filippov     test_op3_ex \op, \fr0, \fr1, \fr2, \fr3, \v0, \v1, \v2, 3, \r3, \sr3
122*e95ef431SMax Filippov .endm
123*e95ef431SMax Filippov 
124*e95ef431SMax Filippov .macro test_op2_cpe op
125*e95ef431SMax Filippov     set_vector  kernel, 2f
126*e95ef431SMax Filippov     movi    a2, 0
127*e95ef431SMax Filippov     wsr     a2, cpenable
128*e95ef431SMax Filippov 1:
129*e95ef431SMax Filippov     \op     f2, f0, f1
130*e95ef431SMax Filippov     test_fail
131*e95ef431SMax Filippov 2:
132*e95ef431SMax Filippov     rsr     a2, excvaddr
133*e95ef431SMax Filippov     movi    a3, 1b
134*e95ef431SMax Filippov     assert  eq, a2, a3
135*e95ef431SMax Filippov     rsr     a2, exccause
136*e95ef431SMax Filippov     movi    a3, 32
137*e95ef431SMax Filippov     assert  eq, a2, a3
138*e95ef431SMax Filippov 
139*e95ef431SMax Filippov     set_vector  kernel, 0
140*e95ef431SMax Filippov     movi    a2, 1
141*e95ef431SMax Filippov     wsr     a2, cpenable
142*e95ef431SMax Filippov .endm
143