xref: /openbmc/qemu/tests/tcg/s390x/bal.S (revision 3db629f03e8caf39526cd0415dac16a6a6484107)
1*c78d9269SIlya Leoshkevich    .org 0x200                         /* lowcore padding */
2*c78d9269SIlya Leoshkevich    .globl _start
3*c78d9269SIlya Leoshkevich_start:
4*c78d9269SIlya Leoshkevich    lpswe start24_psw
5*c78d9269SIlya Leoshkevich_start24:
6*c78d9269SIlya Leoshkevich    lgrl %r0,initial_r0
7*c78d9269SIlya Leoshkevich    lgrl %r1,expected_r0
8*c78d9269SIlya Leoshkevich    bal %r0,0f
9*c78d9269SIlya Leoshkevich0:
10*c78d9269SIlya Leoshkevich    cgrjne %r0,%r1,1f
11*c78d9269SIlya Leoshkevich    lpswe success_psw
12*c78d9269SIlya Leoshkevich1:
13*c78d9269SIlya Leoshkevich    lpswe failure_psw
14*c78d9269SIlya Leoshkevich    .align 8
15*c78d9269SIlya Leoshkevichstart24_psw:
16*c78d9269SIlya Leoshkevich    .quad 0x160000000000,_start24      /* 24-bit mode, cc = 1, pm = 6 */
17*c78d9269SIlya Leoshkevichinitial_r0:
18*c78d9269SIlya Leoshkevich    .quad 0x1234567887654321
19*c78d9269SIlya Leoshkevichexpected_r0:
20*c78d9269SIlya Leoshkevich    .quad 0x1234567896000000 + 0b      /* ilc = 2, cc = 1, pm = 6 */
21*c78d9269SIlya Leoshkevichsuccess_psw:
22*c78d9269SIlya Leoshkevich    .quad 0x2000000000000,0xfff        /* see is_special_wait_psw() */
23*c78d9269SIlya Leoshkevichfailure_psw:
24*c78d9269SIlya Leoshkevich    .quad 0x2000000000000,0            /* disabled wait */
25