1*37b0dba4SPaolo Bonzini #include <stdlib.h> 2*37b0dba4SPaolo Bonzini #include <stdint.h> 3*37b0dba4SPaolo Bonzini #include <assert.h> 4*37b0dba4SPaolo Bonzini 5*37b0dba4SPaolo Bonzini #define MTFSF(FLM, FRB) asm volatile ("mtfsf %0, %1" :: "i" (FLM), "f" (FRB)) 6*37b0dba4SPaolo Bonzini #define MFFS(FRT) asm("mffs %0" : "=f" (FRT)) 7*37b0dba4SPaolo Bonzini #define MFFSCE(FRT) asm("mffsce %0" : "=f" (FRT)) 8*37b0dba4SPaolo Bonzini 9*37b0dba4SPaolo Bonzini #define PPC_BIT_NR(nr) (63 - (nr)) 10*37b0dba4SPaolo Bonzini 11*37b0dba4SPaolo Bonzini #define FP_VE (1ull << PPC_BIT_NR(56)) 12*37b0dba4SPaolo Bonzini #define FP_UE (1ull << PPC_BIT_NR(58)) 13*37b0dba4SPaolo Bonzini #define FP_ZE (1ull << PPC_BIT_NR(59)) 14*37b0dba4SPaolo Bonzini #define FP_XE (1ull << PPC_BIT_NR(60)) 15*37b0dba4SPaolo Bonzini #define FP_NI (1ull << PPC_BIT_NR(61)) 16*37b0dba4SPaolo Bonzini #define FP_RN1 (1ull << PPC_BIT_NR(63)) 17*37b0dba4SPaolo Bonzini main(void)18*37b0dba4SPaolo Bonziniint main(void) 19*37b0dba4SPaolo Bonzini { 20*37b0dba4SPaolo Bonzini uint64_t frt, fpscr; 21*37b0dba4SPaolo Bonzini uint64_t test_value = FP_VE | FP_UE | FP_ZE | 22*37b0dba4SPaolo Bonzini FP_XE | FP_NI | FP_RN1; 23*37b0dba4SPaolo Bonzini MTFSF(0b11111111, test_value); /* set test value to cpu fpscr */ 24*37b0dba4SPaolo Bonzini MFFSCE(frt); 25*37b0dba4SPaolo Bonzini MFFS(fpscr); /* read the value that mffsce stored to cpu fpscr */ 26*37b0dba4SPaolo Bonzini 27*37b0dba4SPaolo Bonzini /* the returned value should be as the cpu fpscr was before */ 28*37b0dba4SPaolo Bonzini assert((frt & 0xff) == test_value); 29*37b0dba4SPaolo Bonzini 30*37b0dba4SPaolo Bonzini /* 31*37b0dba4SPaolo Bonzini * the cpu fpscr last 3 bits should be unchanged 32*37b0dba4SPaolo Bonzini * and enable bits should be unset 33*37b0dba4SPaolo Bonzini */ 34*37b0dba4SPaolo Bonzini assert((fpscr & 0xff) == (test_value & 0x7)); 35*37b0dba4SPaolo Bonzini 36*37b0dba4SPaolo Bonzini return 0; 37*37b0dba4SPaolo Bonzini } 38