xref: /openbmc/qemu/tests/tcg/aarch64/mte-3.c (revision 65d6ae4927d2974bcfe9326c3fdfa0fac5c6295b)
1*36cd5fbdSRichard Henderson /*
2*36cd5fbdSRichard Henderson  * Memory tagging, basic fail cases, asynchronous signals.
3*36cd5fbdSRichard Henderson  *
4*36cd5fbdSRichard Henderson  * Copyright (c) 2021 Linaro Ltd
5*36cd5fbdSRichard Henderson  * SPDX-License-Identifier: GPL-2.0-or-later
6*36cd5fbdSRichard Henderson  */
7*36cd5fbdSRichard Henderson 
8*36cd5fbdSRichard Henderson #include "mte.h"
9*36cd5fbdSRichard Henderson 
pass(int sig,siginfo_t * info,void * uc)10*36cd5fbdSRichard Henderson void pass(int sig, siginfo_t *info, void *uc)
11*36cd5fbdSRichard Henderson {
12*36cd5fbdSRichard Henderson     assert(info->si_code == SEGV_MTEAERR);
13*36cd5fbdSRichard Henderson     exit(0);
14*36cd5fbdSRichard Henderson }
15*36cd5fbdSRichard Henderson 
main(int ac,char ** av)16*36cd5fbdSRichard Henderson int main(int ac, char **av)
17*36cd5fbdSRichard Henderson {
18*36cd5fbdSRichard Henderson     struct sigaction sa;
19*36cd5fbdSRichard Henderson     long *p0, *p1, *p2;
20*36cd5fbdSRichard Henderson     long excl = 1;
21*36cd5fbdSRichard Henderson 
22*36cd5fbdSRichard Henderson     enable_mte(PR_MTE_TCF_ASYNC);
23*36cd5fbdSRichard Henderson     p0 = alloc_mte_mem(sizeof(*p0));
24*36cd5fbdSRichard Henderson 
25*36cd5fbdSRichard Henderson     /* Create two differently tagged pointers.  */
26*36cd5fbdSRichard Henderson     asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(excl));
27*36cd5fbdSRichard Henderson     asm("gmi %0,%1,%0" : "+r"(excl) : "r" (p1));
28*36cd5fbdSRichard Henderson     assert(excl != 1);
29*36cd5fbdSRichard Henderson     asm("irg %0,%1,%2" : "=r"(p2) : "r"(p0), "r"(excl));
30*36cd5fbdSRichard Henderson     assert(p1 != p2);
31*36cd5fbdSRichard Henderson 
32*36cd5fbdSRichard Henderson     /* Store the tag from the first pointer.  */
33*36cd5fbdSRichard Henderson     asm("stg %0, [%0]" : : "r"(p1));
34*36cd5fbdSRichard Henderson 
35*36cd5fbdSRichard Henderson     *p1 = 0;
36*36cd5fbdSRichard Henderson 
37*36cd5fbdSRichard Henderson     memset(&sa, 0, sizeof(sa));
38*36cd5fbdSRichard Henderson     sa.sa_sigaction = pass;
39*36cd5fbdSRichard Henderson     sa.sa_flags = SA_SIGINFO;
40*36cd5fbdSRichard Henderson     sigaction(SIGSEGV, &sa, NULL);
41*36cd5fbdSRichard Henderson 
42*36cd5fbdSRichard Henderson     /*
43*36cd5fbdSRichard Henderson      * Signal for async error will happen eventually.
44*36cd5fbdSRichard Henderson      * For a real kernel this should be after the next IRQ (e.g. timer).
45*36cd5fbdSRichard Henderson      * For qemu linux-user, we kick the cpu and exit at the next TB.
46*36cd5fbdSRichard Henderson      * In either case, loop until this happens (or killed by timeout).
47*36cd5fbdSRichard Henderson      * For extra sauce, yield, producing EXCP_YIELD to cpu_loop().
48*36cd5fbdSRichard Henderson      */
49*36cd5fbdSRichard Henderson     asm("str %0, [%0]; yield" : : "r"(p2));
50*36cd5fbdSRichard Henderson     while (1);
51*36cd5fbdSRichard Henderson }
52