xref: /openbmc/qemu/tests/qtest/cmsdk-apb-dualtimer-test.c (revision 45bef95ca5e9d649e432f2acd82163fb5bccbe47)
19bc064b5SPeter Maydell /*
29bc064b5SPeter Maydell  * QTest testcase for the CMSDK APB dualtimer device
39bc064b5SPeter Maydell  *
49bc064b5SPeter Maydell  * Copyright (c) 2021 Linaro Limited
59bc064b5SPeter Maydell  *
69bc064b5SPeter Maydell  * This program is free software; you can redistribute it and/or modify it
79bc064b5SPeter Maydell  * under the terms of the GNU General Public License as published by the
89bc064b5SPeter Maydell  * Free Software Foundation; either version 2 of the License, or
99bc064b5SPeter Maydell  * (at your option) any later version.
109bc064b5SPeter Maydell  *
119bc064b5SPeter Maydell  * This program is distributed in the hope that it will be useful, but WITHOUT
129bc064b5SPeter Maydell  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
139bc064b5SPeter Maydell  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
149bc064b5SPeter Maydell  * for more details.
159bc064b5SPeter Maydell  */
169bc064b5SPeter Maydell 
179bc064b5SPeter Maydell #include "qemu/osdep.h"
189bc064b5SPeter Maydell #include "libqtest-single.h"
199bc064b5SPeter Maydell 
209bc064b5SPeter Maydell /* IoTKit/ARMSSE dualtimer; driven at 25MHz in mps2-an385, so 40ns per tick */
219bc064b5SPeter Maydell #define TIMER_BASE 0x40002000
229bc064b5SPeter Maydell 
239bc064b5SPeter Maydell #define TIMER1LOAD 0
249bc064b5SPeter Maydell #define TIMER1VALUE 4
259bc064b5SPeter Maydell #define TIMER1CONTROL 8
269bc064b5SPeter Maydell #define TIMER1INTCLR 0xc
279bc064b5SPeter Maydell #define TIMER1RIS 0x10
289bc064b5SPeter Maydell #define TIMER1MIS 0x14
299bc064b5SPeter Maydell #define TIMER1BGLOAD 0x18
309bc064b5SPeter Maydell 
319bc064b5SPeter Maydell #define TIMER2LOAD 0x20
329bc064b5SPeter Maydell #define TIMER2VALUE 0x24
339bc064b5SPeter Maydell #define TIMER2CONTROL 0x28
349bc064b5SPeter Maydell #define TIMER2INTCLR 0x2c
359bc064b5SPeter Maydell #define TIMER2RIS 0x30
369bc064b5SPeter Maydell #define TIMER2MIS 0x34
379bc064b5SPeter Maydell #define TIMER2BGLOAD 0x38
389bc064b5SPeter Maydell 
399bc064b5SPeter Maydell #define CTRL_ENABLE (1 << 7)
409bc064b5SPeter Maydell #define CTRL_PERIODIC (1 << 6)
419bc064b5SPeter Maydell #define CTRL_INTEN (1 << 5)
429bc064b5SPeter Maydell #define CTRL_PRESCALE_1 (0 << 2)
439bc064b5SPeter Maydell #define CTRL_PRESCALE_16 (1 << 2)
449bc064b5SPeter Maydell #define CTRL_PRESCALE_256 (2 << 2)
459bc064b5SPeter Maydell #define CTRL_32BIT (1 << 1)
469bc064b5SPeter Maydell #define CTRL_ONESHOT (1 << 0)
479bc064b5SPeter Maydell 
test_dualtimer(void)489bc064b5SPeter Maydell static void test_dualtimer(void)
499bc064b5SPeter Maydell {
509bc064b5SPeter Maydell     g_assert_true(readl(TIMER_BASE + TIMER1RIS) == 0);
519bc064b5SPeter Maydell 
529bc064b5SPeter Maydell     /* Start timer: will fire after 40000 ns */
539bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1LOAD, 1000);
549bc064b5SPeter Maydell     /* enable in free-running, wrapping, interrupt mode */
559bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1CONTROL, CTRL_ENABLE | CTRL_INTEN);
569bc064b5SPeter Maydell 
579bc064b5SPeter Maydell     /* Step to just past the 500th tick and check VALUE */
589bc064b5SPeter Maydell     clock_step(500 * 40 + 1);
599bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
609bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 500);
619bc064b5SPeter Maydell 
629bc064b5SPeter Maydell     /* Just past the 1000th tick: timer should have fired */
639bc064b5SPeter Maydell     clock_step(500 * 40);
649bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 1);
659bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1VALUE), ==, 0);
669bc064b5SPeter Maydell 
679bc064b5SPeter Maydell     /*
689bc064b5SPeter Maydell      * We are in free-running wrapping 16-bit mode, so on the following
699bc064b5SPeter Maydell      * tick VALUE should have wrapped round to 0xffff.
709bc064b5SPeter Maydell      */
719bc064b5SPeter Maydell     clock_step(40);
72*58045186SInès Varhol     g_assert_cmphex(readl(TIMER_BASE + TIMER1VALUE), ==, 0xffff);
739bc064b5SPeter Maydell 
749bc064b5SPeter Maydell     /* Check that any write to INTCLR clears interrupt */
759bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1INTCLR, 1);
769bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER1RIS), ==, 0);
779bc064b5SPeter Maydell 
789bc064b5SPeter Maydell     /* Turn off the timer */
799bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER1CONTROL, 0);
809bc064b5SPeter Maydell }
819bc064b5SPeter Maydell 
test_prescale(void)829bc064b5SPeter Maydell static void test_prescale(void)
839bc064b5SPeter Maydell {
849bc064b5SPeter Maydell     g_assert_true(readl(TIMER_BASE + TIMER2RIS) == 0);
859bc064b5SPeter Maydell 
869bc064b5SPeter Maydell     /* Start timer: will fire after 40 * 256 * 1000 == 1024000 ns */
879bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2LOAD, 1000);
889bc064b5SPeter Maydell     /* enable in periodic, wrapping, interrupt mode, prescale 256 */
899bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2CONTROL,
909bc064b5SPeter Maydell            CTRL_ENABLE | CTRL_INTEN | CTRL_PERIODIC | CTRL_PRESCALE_256);
919bc064b5SPeter Maydell 
929bc064b5SPeter Maydell     /* Step to just past the 500th tick and check VALUE */
939bc064b5SPeter Maydell     clock_step(40 * 256 * 501);
949bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
959bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 500);
969bc064b5SPeter Maydell 
979bc064b5SPeter Maydell     /* Just past the 1000th tick: timer should have fired */
989bc064b5SPeter Maydell     clock_step(40 * 256 * 500);
999bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 1);
1009bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 0);
1019bc064b5SPeter Maydell 
1029bc064b5SPeter Maydell     /* In periodic mode the tick VALUE now reloads */
1039bc064b5SPeter Maydell     clock_step(40 * 256);
1049bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2VALUE), ==, 1000);
1059bc064b5SPeter Maydell 
1069bc064b5SPeter Maydell     /* Check that any write to INTCLR clears interrupt */
1079bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2INTCLR, 1);
1089bc064b5SPeter Maydell     g_assert_cmpuint(readl(TIMER_BASE + TIMER2RIS), ==, 0);
1099bc064b5SPeter Maydell 
1109bc064b5SPeter Maydell     /* Turn off the timer */
1119bc064b5SPeter Maydell     writel(TIMER_BASE + TIMER2CONTROL, 0);
1129bc064b5SPeter Maydell }
1139bc064b5SPeter Maydell 
main(int argc,char ** argv)1149bc064b5SPeter Maydell int main(int argc, char **argv)
1159bc064b5SPeter Maydell {
1169bc064b5SPeter Maydell     int r;
1179bc064b5SPeter Maydell 
1189bc064b5SPeter Maydell     g_test_init(&argc, &argv, NULL);
1199bc064b5SPeter Maydell 
1209bc064b5SPeter Maydell     qtest_start("-machine mps2-an385");
1219bc064b5SPeter Maydell 
1229bc064b5SPeter Maydell     qtest_add_func("/cmsdk-apb-dualtimer/dualtimer", test_dualtimer);
1239bc064b5SPeter Maydell     qtest_add_func("/cmsdk-apb-dualtimer/prescale", test_prescale);
1249bc064b5SPeter Maydell 
1259bc064b5SPeter Maydell     r = g_test_run();
1269bc064b5SPeter Maydell 
1279bc064b5SPeter Maydell     qtest_end();
1289bc064b5SPeter Maydell 
1299bc064b5SPeter Maydell     return r;
1309bc064b5SPeter Maydell }
131