xref: /openbmc/qemu/tcg/arm/tcg-target-opc.h.inc (revision 32a97c5d05c5deb54a42315d48cecf86cbeadaf4)
176da0a9cSRichard Henderson/*
276da0a9cSRichard Henderson * Copyright (c) 2019 Linaro
376da0a9cSRichard Henderson *
476da0a9cSRichard Henderson * This work is licensed under the terms of the GNU GPL, version 2 or
576da0a9cSRichard Henderson * (at your option) any later version.
676da0a9cSRichard Henderson *
776da0a9cSRichard Henderson * See the COPYING file in the top-level directory for details.
876da0a9cSRichard Henderson *
976da0a9cSRichard Henderson * Target-specific opcodes for host vector expansion.  These will be
1076da0a9cSRichard Henderson * emitted by tcg_expand_vec_op.  For those familiar with GCC internals,
1176da0a9cSRichard Henderson * consider these to be UNSPEC with names.
1276da0a9cSRichard Henderson */
1376da0a9cSRichard Henderson
14*f9af66f6SRichard HendersonDEF(arm_sli_vec, 1, 2, 1, TCG_OPF_VECTOR)
15*f9af66f6SRichard HendersonDEF(arm_sshl_vec, 1, 2, 0, TCG_OPF_VECTOR)
16*f9af66f6SRichard HendersonDEF(arm_ushl_vec, 1, 2, 0, TCG_OPF_VECTOR)
17