xref: /openbmc/qemu/target/sparc/vis_helper.c (revision be8998e046c2a7e434494b75cf468ffd9d536025)
1 /*
2  * VIS op helpers
3  *
4  *  Copyright (c) 2003-2005 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "cpu.h"
22 #include "exec/helper-proto.h"
23 
24 /* This function uses non-native bit order */
25 #define GET_FIELD(X, FROM, TO)                                  \
26     ((X) >> (63 - (TO)) & ((1ULL << ((TO) - (FROM) + 1)) - 1))
27 
28 /* This function uses the order in the manuals, i.e. bit 0 is 2^0 */
29 #define GET_FIELD_SP(X, FROM, TO)               \
30     GET_FIELD(X, 63 - (TO), 63 - (FROM))
31 
32 target_ulong helper_array8(target_ulong pixel_addr, target_ulong cubesize)
33 {
34     return (GET_FIELD_SP(pixel_addr, 60, 63) << (17 + 2 * cubesize)) |
35         (GET_FIELD_SP(pixel_addr, 39, 39 + cubesize - 1) << (17 + cubesize)) |
36         (GET_FIELD_SP(pixel_addr, 17 + cubesize - 1, 17) << 17) |
37         (GET_FIELD_SP(pixel_addr, 56, 59) << 13) |
38         (GET_FIELD_SP(pixel_addr, 35, 38) << 9) |
39         (GET_FIELD_SP(pixel_addr, 13, 16) << 5) |
40         (((pixel_addr >> 55) & 1) << 4) |
41         (GET_FIELD_SP(pixel_addr, 33, 34) << 2) |
42         GET_FIELD_SP(pixel_addr, 11, 12);
43 }
44 
45 #if HOST_BIG_ENDIAN
46 #define VIS_B64(n) b[7 - (n)]
47 #define VIS_W64(n) w[3 - (n)]
48 #define VIS_SW64(n) sw[3 - (n)]
49 #define VIS_L64(n) l[1 - (n)]
50 #define VIS_B32(n) b[3 - (n)]
51 #define VIS_W32(n) w[1 - (n)]
52 #else
53 #define VIS_B64(n) b[n]
54 #define VIS_W64(n) w[n]
55 #define VIS_SW64(n) sw[n]
56 #define VIS_L64(n) l[n]
57 #define VIS_B32(n) b[n]
58 #define VIS_W32(n) w[n]
59 #endif
60 
61 typedef union {
62     uint8_t b[8];
63     uint16_t w[4];
64     int16_t sw[4];
65     uint32_t l[2];
66     uint64_t ll;
67     float64 d;
68 } VIS64;
69 
70 typedef union {
71     uint8_t b[4];
72     uint16_t w[2];
73     uint32_t l;
74     float32 f;
75 } VIS32;
76 
77 uint64_t helper_fpmerge(uint64_t src1, uint64_t src2)
78 {
79     VIS64 s, d;
80 
81     s.ll = src1;
82     d.ll = src2;
83 
84     /* Reverse calculation order to handle overlap */
85     d.VIS_B64(7) = s.VIS_B64(3);
86     d.VIS_B64(6) = d.VIS_B64(3);
87     d.VIS_B64(5) = s.VIS_B64(2);
88     d.VIS_B64(4) = d.VIS_B64(2);
89     d.VIS_B64(3) = s.VIS_B64(1);
90     d.VIS_B64(2) = d.VIS_B64(1);
91     d.VIS_B64(1) = s.VIS_B64(0);
92     /* d.VIS_B64(0) = d.VIS_B64(0); */
93 
94     return d.ll;
95 }
96 
97 uint64_t helper_fmul8x16(uint32_t src1, uint64_t src2)
98 {
99     VIS64 d;
100     VIS32 s;
101     uint32_t tmp;
102 
103     s.l = src1;
104     d.ll = src2;
105 
106 #define PMUL(r)                                                 \
107     tmp = (int32_t)d.VIS_SW64(r) * (int32_t)s.VIS_B32(r);       \
108     if ((tmp & 0xff) > 0x7f) {                                  \
109         tmp += 0x100;                                           \
110     }                                                           \
111     d.VIS_W64(r) = tmp >> 8;
112 
113     PMUL(0);
114     PMUL(1);
115     PMUL(2);
116     PMUL(3);
117 #undef PMUL
118 
119     return d.ll;
120 }
121 
122 uint64_t helper_fmul8x16a(uint32_t src1, int32_t src2)
123 {
124     VIS32 s;
125     VIS64 d;
126     uint32_t tmp;
127 
128     s.l = src1;
129     d.ll = 0;
130 
131 #define PMUL(r)                                \
132     do {                                       \
133         tmp = src2 * (int32_t)s.VIS_B32(r);    \
134         if ((tmp & 0xff) > 0x7f) {             \
135             tmp += 0x100;                      \
136         }                                      \
137         d.VIS_W64(r) = tmp >> 8;               \
138     } while (0)
139 
140     PMUL(0);
141     PMUL(1);
142     PMUL(2);
143     PMUL(3);
144 #undef PMUL
145 
146     return d.ll;
147 }
148 
149 uint64_t helper_fmul8sux16(uint64_t src1, uint64_t src2)
150 {
151     VIS64 s, d;
152     uint32_t tmp;
153 
154     s.ll = src1;
155     d.ll = src2;
156 
157 #define PMUL(r)                                                         \
158     tmp = (int32_t)d.VIS_SW64(r) * ((int32_t)s.VIS_SW64(r) >> 8);       \
159     if ((tmp & 0xff) > 0x7f) {                                          \
160         tmp += 0x100;                                                   \
161     }                                                                   \
162     d.VIS_W64(r) = tmp >> 8;
163 
164     PMUL(0);
165     PMUL(1);
166     PMUL(2);
167     PMUL(3);
168 #undef PMUL
169 
170     return d.ll;
171 }
172 
173 uint64_t helper_fmul8ulx16(uint64_t src1, uint64_t src2)
174 {
175     VIS64 s, d;
176     uint32_t tmp;
177 
178     s.ll = src1;
179     d.ll = src2;
180 
181 #define PMUL(r)                                                         \
182     tmp = (int32_t)d.VIS_SW64(r) * ((uint32_t)s.VIS_B64(r * 2));        \
183     if ((tmp & 0xff) > 0x7f) {                                          \
184         tmp += 0x100;                                                   \
185     }                                                                   \
186     d.VIS_W64(r) = tmp >> 8;
187 
188     PMUL(0);
189     PMUL(1);
190     PMUL(2);
191     PMUL(3);
192 #undef PMUL
193 
194     return d.ll;
195 }
196 
197 uint64_t helper_fexpand(uint32_t src2)
198 {
199     VIS32 s;
200     VIS64 d;
201 
202     s.l = src2;
203     d.ll = 0;
204     d.VIS_W64(0) = s.VIS_B32(0) << 4;
205     d.VIS_W64(1) = s.VIS_B32(1) << 4;
206     d.VIS_W64(2) = s.VIS_B32(2) << 4;
207     d.VIS_W64(3) = s.VIS_B32(3) << 4;
208 
209     return d.ll;
210 }
211 
212 #define VIS_CMPHELPER(name, F)                                    \
213     uint64_t name##16(uint64_t src1, uint64_t src2)               \
214     {                                                             \
215         VIS64 s, d;                                               \
216                                                                   \
217         s.ll = src1;                                              \
218         d.ll = src2;                                              \
219                                                                   \
220         d.VIS_W64(0) = F(s.VIS_W64(0), d.VIS_W64(0)) ? 1 : 0;     \
221         d.VIS_W64(0) |= F(s.VIS_W64(1), d.VIS_W64(1)) ? 2 : 0;    \
222         d.VIS_W64(0) |= F(s.VIS_W64(2), d.VIS_W64(2)) ? 4 : 0;    \
223         d.VIS_W64(0) |= F(s.VIS_W64(3), d.VIS_W64(3)) ? 8 : 0;    \
224         d.VIS_W64(1) = d.VIS_W64(2) = d.VIS_W64(3) = 0;           \
225                                                                   \
226         return d.ll;                                              \
227     }                                                             \
228                                                                   \
229     uint64_t name##32(uint64_t src1, uint64_t src2)               \
230     {                                                             \
231         VIS64 s, d;                                               \
232                                                                   \
233         s.ll = src1;                                              \
234         d.ll = src2;                                              \
235                                                                   \
236         d.VIS_L64(0) = F(s.VIS_L64(0), d.VIS_L64(0)) ? 1 : 0;     \
237         d.VIS_L64(0) |= F(s.VIS_L64(1), d.VIS_L64(1)) ? 2 : 0;    \
238         d.VIS_L64(1) = 0;                                         \
239                                                                   \
240         return d.ll;                                              \
241     }
242 
243 #define FCMPGT(a, b) ((a) > (b))
244 #define FCMPEQ(a, b) ((a) == (b))
245 #define FCMPLE(a, b) ((a) <= (b))
246 #define FCMPNE(a, b) ((a) != (b))
247 
248 VIS_CMPHELPER(helper_fcmpgt, FCMPGT)
249 VIS_CMPHELPER(helper_fcmpeq, FCMPEQ)
250 VIS_CMPHELPER(helper_fcmple, FCMPLE)
251 VIS_CMPHELPER(helper_fcmpne, FCMPNE)
252 
253 uint64_t helper_pdist(uint64_t sum, uint64_t src1, uint64_t src2)
254 {
255     int i;
256     for (i = 0; i < 8; i++) {
257         int s1, s2;
258 
259         s1 = (src1 >> (56 - (i * 8))) & 0xff;
260         s2 = (src2 >> (56 - (i * 8))) & 0xff;
261 
262         /* Absolute value of difference. */
263         s1 -= s2;
264         if (s1 < 0) {
265             s1 = -s1;
266         }
267 
268         sum += s1;
269     }
270 
271     return sum;
272 }
273 
274 uint32_t helper_fpack16(uint64_t gsr, uint64_t rs2)
275 {
276     int scale = (gsr >> 3) & 0xf;
277     uint32_t ret = 0;
278     int byte;
279 
280     for (byte = 0; byte < 4; byte++) {
281         uint32_t val;
282         int16_t src = rs2 >> (byte * 16);
283         int32_t scaled = src << scale;
284         int32_t from_fixed = scaled >> 7;
285 
286         val = (from_fixed < 0 ?  0 :
287                from_fixed > 255 ?  255 : from_fixed);
288 
289         ret |= val << (8 * byte);
290     }
291 
292     return ret;
293 }
294 
295 uint64_t helper_fpack32(uint64_t gsr, uint64_t rs1, uint64_t rs2)
296 {
297     int scale = (gsr >> 3) & 0x1f;
298     uint64_t ret = 0;
299     int word;
300 
301     ret = (rs1 << 8) & ~(0x000000ff000000ffULL);
302     for (word = 0; word < 2; word++) {
303         uint64_t val;
304         int32_t src = rs2 >> (word * 32);
305         int64_t scaled = (int64_t)src << scale;
306         int64_t from_fixed = scaled >> 23;
307 
308         val = (from_fixed < 0 ? 0 :
309                (from_fixed > 255) ? 255 : from_fixed);
310 
311         ret |= val << (32 * word);
312     }
313 
314     return ret;
315 }
316 
317 uint32_t helper_fpackfix(uint64_t gsr, uint64_t rs2)
318 {
319     int scale = (gsr >> 3) & 0x1f;
320     uint32_t ret = 0;
321     int word;
322 
323     for (word = 0; word < 2; word++) {
324         uint32_t val;
325         int32_t src = rs2 >> (word * 32);
326         int64_t scaled = (int64_t)src << scale;
327         int64_t from_fixed = scaled >> 16;
328 
329         val = (from_fixed < -32768 ? -32768 :
330                from_fixed > 32767 ?  32767 : from_fixed);
331 
332         ret |= (val & 0xffff) << (word * 16);
333     }
334 
335     return ret;
336 }
337 
338 uint64_t helper_bshuffle(uint64_t gsr, uint64_t src1, uint64_t src2)
339 {
340     union {
341         uint64_t ll[2];
342         uint8_t b[16];
343     } s;
344     VIS64 r;
345     uint32_t i, mask, host;
346 
347     /* Set up S such that we can index across all of the bytes.  */
348 #if HOST_BIG_ENDIAN
349     s.ll[0] = src1;
350     s.ll[1] = src2;
351     host = 0;
352 #else
353     s.ll[1] = src1;
354     s.ll[0] = src2;
355     host = 15;
356 #endif
357     mask = gsr >> 32;
358 
359     for (i = 0; i < 8; ++i) {
360         unsigned e = (mask >> (28 - i*4)) & 0xf;
361         r.VIS_B64(i) = s.b[e ^ host];
362     }
363 
364     return r.ll;
365 }
366