1 /* 2 * Sparc64 interrupt helpers 3 * 4 * Copyright (c) 2003-2005 Fabrice Bellard 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "cpu.h" 22 #include "exec/helper-proto.h" 23 #include "exec/log.h" 24 #include "trace.h" 25 26 #define DEBUG_PCALL 27 28 #ifdef DEBUG_PCALL 29 static const char * const excp_names[0x80] = { 30 [TT_TFAULT] = "Instruction Access Fault", 31 [TT_TMISS] = "Instruction Access MMU Miss", 32 [TT_CODE_ACCESS] = "Instruction Access Error", 33 [TT_ILL_INSN] = "Illegal Instruction", 34 [TT_PRIV_INSN] = "Privileged Instruction", 35 [TT_NFPU_INSN] = "FPU Disabled", 36 [TT_FP_EXCP] = "FPU Exception", 37 [TT_TOVF] = "Tag Overflow", 38 [TT_CLRWIN] = "Clean Windows", 39 [TT_DIV_ZERO] = "Division By Zero", 40 [TT_DFAULT] = "Data Access Fault", 41 [TT_DMISS] = "Data Access MMU Miss", 42 [TT_DATA_ACCESS] = "Data Access Error", 43 [TT_DPROT] = "Data Protection Error", 44 [TT_UNALIGNED] = "Unaligned Memory Access", 45 [TT_PRIV_ACT] = "Privileged Action", 46 [TT_EXTINT | 0x1] = "External Interrupt 1", 47 [TT_EXTINT | 0x2] = "External Interrupt 2", 48 [TT_EXTINT | 0x3] = "External Interrupt 3", 49 [TT_EXTINT | 0x4] = "External Interrupt 4", 50 [TT_EXTINT | 0x5] = "External Interrupt 5", 51 [TT_EXTINT | 0x6] = "External Interrupt 6", 52 [TT_EXTINT | 0x7] = "External Interrupt 7", 53 [TT_EXTINT | 0x8] = "External Interrupt 8", 54 [TT_EXTINT | 0x9] = "External Interrupt 9", 55 [TT_EXTINT | 0xa] = "External Interrupt 10", 56 [TT_EXTINT | 0xb] = "External Interrupt 11", 57 [TT_EXTINT | 0xc] = "External Interrupt 12", 58 [TT_EXTINT | 0xd] = "External Interrupt 13", 59 [TT_EXTINT | 0xe] = "External Interrupt 14", 60 [TT_EXTINT | 0xf] = "External Interrupt 15", 61 }; 62 #endif 63 64 void sparc_cpu_do_interrupt(CPUState *cs) 65 { 66 SPARCCPU *cpu = SPARC_CPU(cs); 67 CPUSPARCState *env = &cpu->env; 68 int intno = cs->exception_index; 69 trap_state *tsptr; 70 71 /* Compute PSR before exposing state. */ 72 if (env->cc_op != CC_OP_FLAGS) { 73 cpu_get_psr(env); 74 } 75 76 #ifdef DEBUG_PCALL 77 if (qemu_loglevel_mask(CPU_LOG_INT)) { 78 static int count; 79 const char *name; 80 81 if (intno < 0 || intno >= 0x1ff) { 82 name = "Unknown"; 83 } else if (intno >= 0x180) { 84 name = "Hyperprivileged Trap Instruction"; 85 } else if (intno >= 0x100) { 86 name = "Trap Instruction"; 87 } else if (intno >= 0xc0) { 88 name = "Window Fill"; 89 } else if (intno >= 0x80) { 90 name = "Window Spill"; 91 } else { 92 name = excp_names[intno]; 93 if (!name) { 94 name = "Unknown"; 95 } 96 } 97 98 qemu_log("%6d: %s (v=%04x)\n", count, name, intno); 99 log_cpu_state(cs, 0); 100 #if 0 101 { 102 int i; 103 uint8_t *ptr; 104 105 qemu_log(" code="); 106 ptr = (uint8_t *)env->pc; 107 for (i = 0; i < 16; i++) { 108 qemu_log(" %02x", ldub(ptr + i)); 109 } 110 qemu_log("\n"); 111 } 112 #endif 113 count++; 114 } 115 #endif 116 #if !defined(CONFIG_USER_ONLY) 117 if (env->tl >= env->maxtl) { 118 cpu_abort(cs, "Trap 0x%04x while trap level (%d) >= MAXTL (%d)," 119 " Error state", cs->exception_index, env->tl, env->maxtl); 120 return; 121 } 122 #endif 123 if (env->tl < env->maxtl - 1) { 124 env->tl++; 125 } else { 126 env->pstate |= PS_RED; 127 if (env->tl < env->maxtl) { 128 env->tl++; 129 } 130 } 131 tsptr = cpu_tsptr(env); 132 133 tsptr->tstate = (cpu_get_ccr(env) << 32) | 134 ((env->asi & 0xff) << 24) | ((env->pstate & 0xf3f) << 8) | 135 cpu_get_cwp64(env); 136 tsptr->tpc = env->pc; 137 tsptr->tnpc = env->npc; 138 tsptr->tt = intno; 139 140 if (cpu_has_hypervisor(env)) { 141 env->htstate[env->tl] = env->hpstate; 142 /* XXX OpenSPARC T1 - UltraSPARC T3 have MAXPTL=2 143 but this may change in the future */ 144 if (env->tl > 2) { 145 env->hpstate |= HS_PRIV; 146 } 147 } 148 149 switch (intno) { 150 case TT_IVEC: 151 if (!cpu_has_hypervisor(env)) { 152 cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_IG); 153 } 154 break; 155 case TT_TFAULT: 156 case TT_DFAULT: 157 case TT_TMISS ... TT_TMISS + 3: 158 case TT_DMISS ... TT_DMISS + 3: 159 case TT_DPROT ... TT_DPROT + 3: 160 if (cpu_has_hypervisor(env)) { 161 env->hpstate |= HS_PRIV; 162 env->pstate = PS_PEF | PS_PRIV; 163 } else { 164 cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_MG); 165 } 166 break; 167 case TT_INSN_REAL_TRANSLATION_MISS ... TT_DATA_REAL_TRANSLATION_MISS: 168 case TT_HTRAP ... TT_HTRAP + 127: 169 env->hpstate |= HS_PRIV; 170 break; 171 default: 172 cpu_change_pstate(env, PS_PEF | PS_PRIV | PS_AG); 173 break; 174 } 175 176 if (intno == TT_CLRWIN) { 177 cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - 1)); 178 } else if ((intno & 0x1c0) == TT_SPILL) { 179 cpu_set_cwp(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2)); 180 } else if ((intno & 0x1c0) == TT_FILL) { 181 cpu_set_cwp(env, cpu_cwp_inc(env, env->cwp + 1)); 182 } 183 184 if (cpu_hypervisor_mode(env)) { 185 env->pc = (env->htba & ~0x3fffULL) | (intno << 5); 186 } else { 187 env->pc = env->tbr & ~0x7fffULL; 188 env->pc |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5); 189 } 190 env->npc = env->pc + 4; 191 cs->exception_index = -1; 192 } 193 194 trap_state *cpu_tsptr(CPUSPARCState* env) 195 { 196 return &env->ts[env->tl & MAXTL_MASK]; 197 } 198 199 static bool do_modify_softint(CPUSPARCState *env, uint32_t value) 200 { 201 if (env->softint != value) { 202 env->softint = value; 203 #if !defined(CONFIG_USER_ONLY) 204 if (cpu_interrupts_enabled(env)) { 205 cpu_check_irqs(env); 206 } 207 #endif 208 return true; 209 } 210 return false; 211 } 212 213 void helper_set_softint(CPUSPARCState *env, uint64_t value) 214 { 215 if (do_modify_softint(env, env->softint | (uint32_t)value)) { 216 trace_int_helper_set_softint(env->softint); 217 } 218 } 219 220 void helper_clear_softint(CPUSPARCState *env, uint64_t value) 221 { 222 if (do_modify_softint(env, env->softint & (uint32_t)~value)) { 223 trace_int_helper_clear_softint(env->softint); 224 } 225 } 226 227 void helper_write_softint(CPUSPARCState *env, uint64_t value) 228 { 229 if (do_modify_softint(env, (uint32_t)value)) { 230 trace_int_helper_write_softint(env->softint); 231 } 232 } 233