1fcf5ef2aSThomas Huth /*
2fcf5ef2aSThomas Huth * SPARC gdb server stub
3fcf5ef2aSThomas Huth *
4fcf5ef2aSThomas Huth * Copyright (c) 2003-2005 Fabrice Bellard
5fcf5ef2aSThomas Huth * Copyright (c) 2013 SUSE LINUX Products GmbH
6fcf5ef2aSThomas Huth *
7fcf5ef2aSThomas Huth * This library is free software; you can redistribute it and/or
8fcf5ef2aSThomas Huth * modify it under the terms of the GNU Lesser General Public
9fcf5ef2aSThomas Huth * License as published by the Free Software Foundation; either
105650b549SChetan Pant * version 2.1 of the License, or (at your option) any later version.
11fcf5ef2aSThomas Huth *
12fcf5ef2aSThomas Huth * This library is distributed in the hope that it will be useful,
13fcf5ef2aSThomas Huth * but WITHOUT ANY WARRANTY; without even the implied warranty of
14fcf5ef2aSThomas Huth * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15fcf5ef2aSThomas Huth * Lesser General Public License for more details.
16fcf5ef2aSThomas Huth *
17fcf5ef2aSThomas Huth * You should have received a copy of the GNU Lesser General Public
18fcf5ef2aSThomas Huth * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19fcf5ef2aSThomas Huth */
20fcf5ef2aSThomas Huth #include "qemu/osdep.h"
21fcf5ef2aSThomas Huth #include "cpu.h"
224ea5fe99SAlex Bennée #include "gdbstub/helpers.h"
23fcf5ef2aSThomas Huth
24fcf5ef2aSThomas Huth #ifdef TARGET_ABI32
25fcf5ef2aSThomas Huth #define gdb_get_rega(buf, val) gdb_get_reg32(buf, val)
26fcf5ef2aSThomas Huth #else
27fcf5ef2aSThomas Huth #define gdb_get_rega(buf, val) gdb_get_regl(buf, val)
28fcf5ef2aSThomas Huth #endif
29fcf5ef2aSThomas Huth
sparc_cpu_gdb_read_register(CPUState * cs,GByteArray * mem_buf,int n)30a010bdbeSAlex Bennée int sparc_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
31fcf5ef2aSThomas Huth {
3277976769SPhilippe Mathieu-Daudé CPUSPARCState *env = cpu_env(cs);
33fcf5ef2aSThomas Huth
34fcf5ef2aSThomas Huth if (n < 8) {
35fcf5ef2aSThomas Huth /* g0..g7 */
36fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->gregs[n]);
37fcf5ef2aSThomas Huth }
38fcf5ef2aSThomas Huth if (n < 32) {
39fcf5ef2aSThomas Huth /* register window */
40fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->regwptr[n - 8]);
41fcf5ef2aSThomas Huth }
42fcf5ef2aSThomas Huth #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
43fcf5ef2aSThomas Huth if (n < 64) {
44fcf5ef2aSThomas Huth /* fprs */
45fcf5ef2aSThomas Huth if (n & 1) {
46fcf5ef2aSThomas Huth return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
47fcf5ef2aSThomas Huth } else {
48fcf5ef2aSThomas Huth return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
49fcf5ef2aSThomas Huth }
50fcf5ef2aSThomas Huth }
51fcf5ef2aSThomas Huth /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
52fcf5ef2aSThomas Huth switch (n) {
53fcf5ef2aSThomas Huth case 64:
54fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->y);
55fcf5ef2aSThomas Huth case 65:
56fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, cpu_get_psr(env));
57fcf5ef2aSThomas Huth case 66:
58fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->wim);
59fcf5ef2aSThomas Huth case 67:
60fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->tbr);
61fcf5ef2aSThomas Huth case 68:
62fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->pc);
63fcf5ef2aSThomas Huth case 69:
64fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, env->npc);
65fcf5ef2aSThomas Huth case 70:
661ccd6e13SRichard Henderson return gdb_get_rega(mem_buf, cpu_get_fsr(env));
67fcf5ef2aSThomas Huth case 71:
68fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, 0); /* csr */
69fcf5ef2aSThomas Huth default:
70fcf5ef2aSThomas Huth return gdb_get_rega(mem_buf, 0);
71fcf5ef2aSThomas Huth }
72fcf5ef2aSThomas Huth #else
73fcf5ef2aSThomas Huth if (n < 64) {
74fcf5ef2aSThomas Huth /* f0-f31 */
75fcf5ef2aSThomas Huth if (n & 1) {
76fcf5ef2aSThomas Huth return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.lower);
77fcf5ef2aSThomas Huth } else {
78fcf5ef2aSThomas Huth return gdb_get_reg32(mem_buf, env->fpr[(n - 32) / 2].l.upper);
79fcf5ef2aSThomas Huth }
80fcf5ef2aSThomas Huth }
81fcf5ef2aSThomas Huth if (n < 80) {
82fcf5ef2aSThomas Huth /* f32-f62 (double width, even numbers only) */
83fcf5ef2aSThomas Huth return gdb_get_reg64(mem_buf, env->fpr[(n - 32) / 2].ll);
84fcf5ef2aSThomas Huth }
85fcf5ef2aSThomas Huth switch (n) {
86fcf5ef2aSThomas Huth case 80:
87fcf5ef2aSThomas Huth return gdb_get_regl(mem_buf, env->pc);
88fcf5ef2aSThomas Huth case 81:
89fcf5ef2aSThomas Huth return gdb_get_regl(mem_buf, env->npc);
90fcf5ef2aSThomas Huth case 82:
91fcf5ef2aSThomas Huth return gdb_get_regl(mem_buf, (cpu_get_ccr(env) << 32) |
92fcf5ef2aSThomas Huth ((env->asi & 0xff) << 24) |
93fcf5ef2aSThomas Huth ((env->pstate & 0xfff) << 8) |
94fcf5ef2aSThomas Huth cpu_get_cwp64(env));
95fcf5ef2aSThomas Huth case 83:
961ccd6e13SRichard Henderson return gdb_get_regl(mem_buf, cpu_get_fsr(env));
97fcf5ef2aSThomas Huth case 84:
98fcf5ef2aSThomas Huth return gdb_get_regl(mem_buf, env->fprs);
99fcf5ef2aSThomas Huth case 85:
100fcf5ef2aSThomas Huth return gdb_get_regl(mem_buf, env->y);
101fcf5ef2aSThomas Huth }
102fcf5ef2aSThomas Huth #endif
103fcf5ef2aSThomas Huth return 0;
104fcf5ef2aSThomas Huth }
105fcf5ef2aSThomas Huth
sparc_cpu_gdb_write_register(CPUState * cs,uint8_t * mem_buf,int n)106fcf5ef2aSThomas Huth int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
107fcf5ef2aSThomas Huth {
108fcf5ef2aSThomas Huth SPARCCPU *cpu = SPARC_CPU(cs);
109fcf5ef2aSThomas Huth CPUSPARCState *env = &cpu->env;
110fcf5ef2aSThomas Huth #if defined(TARGET_ABI32)
111*9b21d29aSPhilippe Mathieu-Daudé uint32_t tmp;
112fcf5ef2aSThomas Huth
113fcf5ef2aSThomas Huth tmp = ldl_p(mem_buf);
114fcf5ef2aSThomas Huth #else
115fcf5ef2aSThomas Huth target_ulong tmp;
116fcf5ef2aSThomas Huth
117fcf5ef2aSThomas Huth tmp = ldtul_p(mem_buf);
118fcf5ef2aSThomas Huth #endif
119fcf5ef2aSThomas Huth
120fcf5ef2aSThomas Huth if (n < 8) {
121fcf5ef2aSThomas Huth /* g0..g7 */
122fcf5ef2aSThomas Huth env->gregs[n] = tmp;
123fcf5ef2aSThomas Huth } else if (n < 32) {
124fcf5ef2aSThomas Huth /* register window */
125fcf5ef2aSThomas Huth env->regwptr[n - 8] = tmp;
126fcf5ef2aSThomas Huth }
127fcf5ef2aSThomas Huth #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
128fcf5ef2aSThomas Huth else if (n < 64) {
129fcf5ef2aSThomas Huth /* fprs */
130fcf5ef2aSThomas Huth /* f0-f31 */
131fcf5ef2aSThomas Huth if (n & 1) {
132fcf5ef2aSThomas Huth env->fpr[(n - 32) / 2].l.lower = tmp;
133fcf5ef2aSThomas Huth } else {
134fcf5ef2aSThomas Huth env->fpr[(n - 32) / 2].l.upper = tmp;
135fcf5ef2aSThomas Huth }
136fcf5ef2aSThomas Huth } else {
137fcf5ef2aSThomas Huth /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
138fcf5ef2aSThomas Huth switch (n) {
139fcf5ef2aSThomas Huth case 64:
140fcf5ef2aSThomas Huth env->y = tmp;
141fcf5ef2aSThomas Huth break;
142fcf5ef2aSThomas Huth case 65:
143fcf5ef2aSThomas Huth cpu_put_psr(env, tmp);
144fcf5ef2aSThomas Huth break;
145fcf5ef2aSThomas Huth case 66:
146fcf5ef2aSThomas Huth env->wim = tmp;
147fcf5ef2aSThomas Huth break;
148fcf5ef2aSThomas Huth case 67:
149fcf5ef2aSThomas Huth env->tbr = tmp;
150fcf5ef2aSThomas Huth break;
151fcf5ef2aSThomas Huth case 68:
152fcf5ef2aSThomas Huth env->pc = tmp;
153fcf5ef2aSThomas Huth break;
154fcf5ef2aSThomas Huth case 69:
155fcf5ef2aSThomas Huth env->npc = tmp;
156fcf5ef2aSThomas Huth break;
157fcf5ef2aSThomas Huth case 70:
1581ccd6e13SRichard Henderson cpu_put_fsr(env, tmp);
159fcf5ef2aSThomas Huth break;
160fcf5ef2aSThomas Huth default:
161fcf5ef2aSThomas Huth return 0;
162fcf5ef2aSThomas Huth }
163fcf5ef2aSThomas Huth }
164fcf5ef2aSThomas Huth return 4;
165fcf5ef2aSThomas Huth #else
166fcf5ef2aSThomas Huth else if (n < 64) {
167fcf5ef2aSThomas Huth /* f0-f31 */
168fcf5ef2aSThomas Huth tmp = ldl_p(mem_buf);
169fcf5ef2aSThomas Huth if (n & 1) {
170fcf5ef2aSThomas Huth env->fpr[(n - 32) / 2].l.lower = tmp;
171fcf5ef2aSThomas Huth } else {
172fcf5ef2aSThomas Huth env->fpr[(n - 32) / 2].l.upper = tmp;
173fcf5ef2aSThomas Huth }
174fcf5ef2aSThomas Huth return 4;
175fcf5ef2aSThomas Huth } else if (n < 80) {
176fcf5ef2aSThomas Huth /* f32-f62 (double width, even numbers only) */
177fcf5ef2aSThomas Huth env->fpr[(n - 32) / 2].ll = tmp;
178fcf5ef2aSThomas Huth } else {
179fcf5ef2aSThomas Huth switch (n) {
180fcf5ef2aSThomas Huth case 80:
181fcf5ef2aSThomas Huth env->pc = tmp;
182fcf5ef2aSThomas Huth break;
183fcf5ef2aSThomas Huth case 81:
184fcf5ef2aSThomas Huth env->npc = tmp;
185fcf5ef2aSThomas Huth break;
186fcf5ef2aSThomas Huth case 82:
187fcf5ef2aSThomas Huth cpu_put_ccr(env, tmp >> 32);
188fcf5ef2aSThomas Huth env->asi = (tmp >> 24) & 0xff;
189fcf5ef2aSThomas Huth env->pstate = (tmp >> 8) & 0xfff;
190fcf5ef2aSThomas Huth cpu_put_cwp64(env, tmp & 0xff);
191fcf5ef2aSThomas Huth break;
192fcf5ef2aSThomas Huth case 83:
1931ccd6e13SRichard Henderson cpu_put_fsr(env, tmp);
194fcf5ef2aSThomas Huth break;
195fcf5ef2aSThomas Huth case 84:
196fcf5ef2aSThomas Huth env->fprs = tmp;
197fcf5ef2aSThomas Huth break;
198fcf5ef2aSThomas Huth case 85:
199fcf5ef2aSThomas Huth env->y = tmp;
200fcf5ef2aSThomas Huth break;
201fcf5ef2aSThomas Huth default:
202fcf5ef2aSThomas Huth return 0;
203fcf5ef2aSThomas Huth }
204fcf5ef2aSThomas Huth }
205fcf5ef2aSThomas Huth return 8;
206fcf5ef2aSThomas Huth #endif
207fcf5ef2aSThomas Huth }
208