xref: /openbmc/qemu/target/sh4/monitor.c (revision 5ececc3a0b0086c6168e12f4d032809477b30fe5)
1fcf5ef2aSThomas Huth /*
2fcf5ef2aSThomas Huth  * QEMU monitor
3fcf5ef2aSThomas Huth  *
4fcf5ef2aSThomas Huth  * Copyright (c) 2003-2004 Fabrice Bellard
5fcf5ef2aSThomas Huth  *
6fcf5ef2aSThomas Huth  * Permission is hereby granted, free of charge, to any person obtaining a copy
7fcf5ef2aSThomas Huth  * of this software and associated documentation files (the "Software"), to deal
8fcf5ef2aSThomas Huth  * in the Software without restriction, including without limitation the rights
9fcf5ef2aSThomas Huth  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10fcf5ef2aSThomas Huth  * copies of the Software, and to permit persons to whom the Software is
11fcf5ef2aSThomas Huth  * furnished to do so, subject to the following conditions:
12fcf5ef2aSThomas Huth  *
13fcf5ef2aSThomas Huth  * The above copyright notice and this permission notice shall be included in
14fcf5ef2aSThomas Huth  * all copies or substantial portions of the Software.
15fcf5ef2aSThomas Huth  *
16fcf5ef2aSThomas Huth  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17fcf5ef2aSThomas Huth  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18fcf5ef2aSThomas Huth  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19fcf5ef2aSThomas Huth  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20fcf5ef2aSThomas Huth  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21fcf5ef2aSThomas Huth  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22fcf5ef2aSThomas Huth  * THE SOFTWARE.
23fcf5ef2aSThomas Huth  */
24fcf5ef2aSThomas Huth #include "qemu/osdep.h"
25fcf5ef2aSThomas Huth #include "cpu.h"
26fcf5ef2aSThomas Huth #include "monitor/monitor.h"
27fcf5ef2aSThomas Huth #include "monitor/hmp-target.h"
28275307aaSMarkus Armbruster #include "monitor/hmp.h"
29fcf5ef2aSThomas Huth 
print_tlb(Monitor * mon,int idx,tlb_t * tlb)30fcf5ef2aSThomas Huth static void print_tlb(Monitor *mon, int idx, tlb_t *tlb)
31fcf5ef2aSThomas Huth {
32fcf5ef2aSThomas Huth     monitor_printf(mon, " tlb%i:\t"
33fcf5ef2aSThomas Huth                    "asid=%hhu vpn=%x\tppn=%x\tsz=%hhu size=%u\t"
34fcf5ef2aSThomas Huth                    "v=%hhu shared=%hhu cached=%hhu prot=%hhu "
35fcf5ef2aSThomas Huth                    "dirty=%hhu writethrough=%hhu\n",
36fcf5ef2aSThomas Huth                    idx,
37fcf5ef2aSThomas Huth                    tlb->asid, tlb->vpn, tlb->ppn, tlb->sz, tlb->size,
38fcf5ef2aSThomas Huth                    tlb->v, tlb->sh, tlb->c, tlb->pr,
39fcf5ef2aSThomas Huth                    tlb->d, tlb->wt);
40fcf5ef2aSThomas Huth }
41fcf5ef2aSThomas Huth 
hmp_info_tlb(Monitor * mon,const QDict * qdict)42fcf5ef2aSThomas Huth void hmp_info_tlb(Monitor *mon, const QDict *qdict)
43fcf5ef2aSThomas Huth {
44*e7cff9c6SKevin Wolf     CPUArchState *env = mon_get_cpu_env(mon);
45fcf5ef2aSThomas Huth     int i;
46fcf5ef2aSThomas Huth 
47854e67feSThomas Huth     if (!env) {
48854e67feSThomas Huth         monitor_printf(mon, "No CPU available\n");
49854e67feSThomas Huth         return;
50854e67feSThomas Huth     }
51854e67feSThomas Huth 
52fcf5ef2aSThomas Huth     monitor_printf (mon, "ITLB:\n");
53fcf5ef2aSThomas Huth     for (i = 0 ; i < ITLB_SIZE ; i++)
54fcf5ef2aSThomas Huth         print_tlb (mon, i, &env->itlb[i]);
55fcf5ef2aSThomas Huth     monitor_printf (mon, "UTLB:\n");
56fcf5ef2aSThomas Huth     for (i = 0 ; i < UTLB_SIZE ; i++)
57fcf5ef2aSThomas Huth         print_tlb (mon, i, &env->utlb[i]);
58fcf5ef2aSThomas Huth }
59