xref: /openbmc/qemu/target/sh4/gdbstub.c (revision fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0)
1*fcf5ef2aSThomas Huth /*
2*fcf5ef2aSThomas Huth  * SuperH gdb server stub
3*fcf5ef2aSThomas Huth  *
4*fcf5ef2aSThomas Huth  * Copyright (c) 2003-2005 Fabrice Bellard
5*fcf5ef2aSThomas Huth  * Copyright (c) 2013 SUSE LINUX Products GmbH
6*fcf5ef2aSThomas Huth  *
7*fcf5ef2aSThomas Huth  * This library is free software; you can redistribute it and/or
8*fcf5ef2aSThomas Huth  * modify it under the terms of the GNU Lesser General Public
9*fcf5ef2aSThomas Huth  * License as published by the Free Software Foundation; either
10*fcf5ef2aSThomas Huth  * version 2 of the License, or (at your option) any later version.
11*fcf5ef2aSThomas Huth  *
12*fcf5ef2aSThomas Huth  * This library is distributed in the hope that it will be useful,
13*fcf5ef2aSThomas Huth  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14*fcf5ef2aSThomas Huth  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15*fcf5ef2aSThomas Huth  * Lesser General Public License for more details.
16*fcf5ef2aSThomas Huth  *
17*fcf5ef2aSThomas Huth  * You should have received a copy of the GNU Lesser General Public
18*fcf5ef2aSThomas Huth  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19*fcf5ef2aSThomas Huth  */
20*fcf5ef2aSThomas Huth #include "qemu/osdep.h"
21*fcf5ef2aSThomas Huth #include "qemu-common.h"
22*fcf5ef2aSThomas Huth #include "cpu.h"
23*fcf5ef2aSThomas Huth #include "exec/gdbstub.h"
24*fcf5ef2aSThomas Huth 
25*fcf5ef2aSThomas Huth /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
26*fcf5ef2aSThomas Huth /* FIXME: We should use XML for this.  */
27*fcf5ef2aSThomas Huth 
28*fcf5ef2aSThomas Huth int superh_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
29*fcf5ef2aSThomas Huth {
30*fcf5ef2aSThomas Huth     SuperHCPU *cpu = SUPERH_CPU(cs);
31*fcf5ef2aSThomas Huth     CPUSH4State *env = &cpu->env;
32*fcf5ef2aSThomas Huth 
33*fcf5ef2aSThomas Huth     switch (n) {
34*fcf5ef2aSThomas Huth     case 0 ... 7:
35*fcf5ef2aSThomas Huth         if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) {
36*fcf5ef2aSThomas Huth             return gdb_get_regl(mem_buf, env->gregs[n + 16]);
37*fcf5ef2aSThomas Huth         } else {
38*fcf5ef2aSThomas Huth             return gdb_get_regl(mem_buf, env->gregs[n]);
39*fcf5ef2aSThomas Huth         }
40*fcf5ef2aSThomas Huth     case 8 ... 15:
41*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->gregs[n]);
42*fcf5ef2aSThomas Huth     case 16:
43*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->pc);
44*fcf5ef2aSThomas Huth     case 17:
45*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->pr);
46*fcf5ef2aSThomas Huth     case 18:
47*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->gbr);
48*fcf5ef2aSThomas Huth     case 19:
49*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->vbr);
50*fcf5ef2aSThomas Huth     case 20:
51*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->mach);
52*fcf5ef2aSThomas Huth     case 21:
53*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->macl);
54*fcf5ef2aSThomas Huth     case 22:
55*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, cpu_read_sr(env));
56*fcf5ef2aSThomas Huth     case 23:
57*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->fpul);
58*fcf5ef2aSThomas Huth     case 24:
59*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->fpscr);
60*fcf5ef2aSThomas Huth     case 25 ... 40:
61*fcf5ef2aSThomas Huth         if (env->fpscr & FPSCR_FR) {
62*fcf5ef2aSThomas Huth             stfl_p(mem_buf, env->fregs[n - 9]);
63*fcf5ef2aSThomas Huth         } else {
64*fcf5ef2aSThomas Huth             stfl_p(mem_buf, env->fregs[n - 25]);
65*fcf5ef2aSThomas Huth         }
66*fcf5ef2aSThomas Huth         return 4;
67*fcf5ef2aSThomas Huth     case 41:
68*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->ssr);
69*fcf5ef2aSThomas Huth     case 42:
70*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->spc);
71*fcf5ef2aSThomas Huth     case 43 ... 50:
72*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->gregs[n - 43]);
73*fcf5ef2aSThomas Huth     case 51 ... 58:
74*fcf5ef2aSThomas Huth         return gdb_get_regl(mem_buf, env->gregs[n - (51 - 16)]);
75*fcf5ef2aSThomas Huth     }
76*fcf5ef2aSThomas Huth 
77*fcf5ef2aSThomas Huth     return 0;
78*fcf5ef2aSThomas Huth }
79*fcf5ef2aSThomas Huth 
80*fcf5ef2aSThomas Huth int superh_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
81*fcf5ef2aSThomas Huth {
82*fcf5ef2aSThomas Huth     SuperHCPU *cpu = SUPERH_CPU(cs);
83*fcf5ef2aSThomas Huth     CPUSH4State *env = &cpu->env;
84*fcf5ef2aSThomas Huth 
85*fcf5ef2aSThomas Huth     switch (n) {
86*fcf5ef2aSThomas Huth     case 0 ... 7:
87*fcf5ef2aSThomas Huth         if ((env->sr & (1u << SR_MD)) && (env->sr & (1u << SR_RB))) {
88*fcf5ef2aSThomas Huth             env->gregs[n + 16] = ldl_p(mem_buf);
89*fcf5ef2aSThomas Huth         } else {
90*fcf5ef2aSThomas Huth             env->gregs[n] = ldl_p(mem_buf);
91*fcf5ef2aSThomas Huth         }
92*fcf5ef2aSThomas Huth         break;
93*fcf5ef2aSThomas Huth     case 8 ... 15:
94*fcf5ef2aSThomas Huth         env->gregs[n] = ldl_p(mem_buf);
95*fcf5ef2aSThomas Huth         break;
96*fcf5ef2aSThomas Huth     case 16:
97*fcf5ef2aSThomas Huth         env->pc = ldl_p(mem_buf);
98*fcf5ef2aSThomas Huth         break;
99*fcf5ef2aSThomas Huth     case 17:
100*fcf5ef2aSThomas Huth         env->pr = ldl_p(mem_buf);
101*fcf5ef2aSThomas Huth         break;
102*fcf5ef2aSThomas Huth     case 18:
103*fcf5ef2aSThomas Huth         env->gbr = ldl_p(mem_buf);
104*fcf5ef2aSThomas Huth         break;
105*fcf5ef2aSThomas Huth     case 19:
106*fcf5ef2aSThomas Huth         env->vbr = ldl_p(mem_buf);
107*fcf5ef2aSThomas Huth         break;
108*fcf5ef2aSThomas Huth     case 20:
109*fcf5ef2aSThomas Huth         env->mach = ldl_p(mem_buf);
110*fcf5ef2aSThomas Huth         break;
111*fcf5ef2aSThomas Huth     case 21:
112*fcf5ef2aSThomas Huth         env->macl = ldl_p(mem_buf);
113*fcf5ef2aSThomas Huth         break;
114*fcf5ef2aSThomas Huth     case 22:
115*fcf5ef2aSThomas Huth         cpu_write_sr(env, ldl_p(mem_buf));
116*fcf5ef2aSThomas Huth         break;
117*fcf5ef2aSThomas Huth     case 23:
118*fcf5ef2aSThomas Huth         env->fpul = ldl_p(mem_buf);
119*fcf5ef2aSThomas Huth         break;
120*fcf5ef2aSThomas Huth     case 24:
121*fcf5ef2aSThomas Huth         env->fpscr = ldl_p(mem_buf);
122*fcf5ef2aSThomas Huth         break;
123*fcf5ef2aSThomas Huth     case 25 ... 40:
124*fcf5ef2aSThomas Huth         if (env->fpscr & FPSCR_FR) {
125*fcf5ef2aSThomas Huth             env->fregs[n - 9] = ldfl_p(mem_buf);
126*fcf5ef2aSThomas Huth         } else {
127*fcf5ef2aSThomas Huth             env->fregs[n - 25] = ldfl_p(mem_buf);
128*fcf5ef2aSThomas Huth         }
129*fcf5ef2aSThomas Huth         break;
130*fcf5ef2aSThomas Huth     case 41:
131*fcf5ef2aSThomas Huth         env->ssr = ldl_p(mem_buf);
132*fcf5ef2aSThomas Huth         break;
133*fcf5ef2aSThomas Huth     case 42:
134*fcf5ef2aSThomas Huth         env->spc = ldl_p(mem_buf);
135*fcf5ef2aSThomas Huth         break;
136*fcf5ef2aSThomas Huth     case 43 ... 50:
137*fcf5ef2aSThomas Huth         env->gregs[n - 43] = ldl_p(mem_buf);
138*fcf5ef2aSThomas Huth         break;
139*fcf5ef2aSThomas Huth     case 51 ... 58:
140*fcf5ef2aSThomas Huth         env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
141*fcf5ef2aSThomas Huth         break;
142*fcf5ef2aSThomas Huth     default:
143*fcf5ef2aSThomas Huth         return 0;
144*fcf5ef2aSThomas Huth     }
145*fcf5ef2aSThomas Huth 
146*fcf5ef2aSThomas Huth     return 4;
147*fcf5ef2aSThomas Huth }
148