1*0d429bd2SPhilipp Tomsich# 2*0d429bd2SPhilipp Tomsich# RISC-V translation routines for the XVentanaCondOps extension 3*0d429bd2SPhilipp Tomsich# 4*0d429bd2SPhilipp Tomsich# Copyright (c) 2022 Dr. Philipp Tomsich, philipp.tomsich@vrull.eu 5*0d429bd2SPhilipp Tomsich# 6*0d429bd2SPhilipp Tomsich# SPDX-License-Identifier: LGPL-2.1-or-later 7*0d429bd2SPhilipp Tomsich# 8*0d429bd2SPhilipp Tomsich# Reference: VTx-family custom instructions 9*0d429bd2SPhilipp Tomsich# Custom ISA extensions for Ventana Micro Systems RISC-V cores 10*0d429bd2SPhilipp Tomsich# (https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.0/ventana-custom-extensions-v1.0.0.pdf) 11*0d429bd2SPhilipp Tomsich 12*0d429bd2SPhilipp Tomsich# Fields 13*0d429bd2SPhilipp Tomsich%rs2 20:5 14*0d429bd2SPhilipp Tomsich%rs1 15:5 15*0d429bd2SPhilipp Tomsich%rd 7:5 16*0d429bd2SPhilipp Tomsich 17*0d429bd2SPhilipp Tomsich# Argument sets 18*0d429bd2SPhilipp Tomsich&r rd rs1 rs2 !extern 19*0d429bd2SPhilipp Tomsich 20*0d429bd2SPhilipp Tomsich# Formats 21*0d429bd2SPhilipp Tomsich@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd 22*0d429bd2SPhilipp Tomsich 23*0d429bd2SPhilipp Tomsich# *** RV64 Custom-3 Extension *** 24*0d429bd2SPhilipp Tomsichvt_maskc 0000000 ..... ..... 110 ..... 1111011 @r 25*0d429bd2SPhilipp Tomsichvt_maskcn 0000000 ..... ..... 111 ..... 1111011 @r 26