1*32cad1ffSPhilippe Mathieu-Daudé /*
2*32cad1ffSPhilippe Mathieu-Daudé * MIPS TLB (Translation lookaside buffer) helpers.
3*32cad1ffSPhilippe Mathieu-Daudé *
4*32cad1ffSPhilippe Mathieu-Daudé * Copyright (c) 2004-2005 Jocelyn Mayer
5*32cad1ffSPhilippe Mathieu-Daudé *
6*32cad1ffSPhilippe Mathieu-Daudé * This library is free software; you can redistribute it and/or
7*32cad1ffSPhilippe Mathieu-Daudé * modify it under the terms of the GNU Lesser General Public
8*32cad1ffSPhilippe Mathieu-Daudé * License as published by the Free Software Foundation; either
9*32cad1ffSPhilippe Mathieu-Daudé * version 2.1 of the License, or (at your option) any later version.
10*32cad1ffSPhilippe Mathieu-Daudé *
11*32cad1ffSPhilippe Mathieu-Daudé * This library is distributed in the hope that it will be useful,
12*32cad1ffSPhilippe Mathieu-Daudé * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*32cad1ffSPhilippe Mathieu-Daudé * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14*32cad1ffSPhilippe Mathieu-Daudé * Lesser General Public License for more details.
15*32cad1ffSPhilippe Mathieu-Daudé *
16*32cad1ffSPhilippe Mathieu-Daudé * You should have received a copy of the GNU Lesser General Public
17*32cad1ffSPhilippe Mathieu-Daudé * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18*32cad1ffSPhilippe Mathieu-Daudé */
19*32cad1ffSPhilippe Mathieu-Daudé #include "qemu/osdep.h"
20*32cad1ffSPhilippe Mathieu-Daudé #include "cpu.h"
21*32cad1ffSPhilippe Mathieu-Daudé #include "exec/exec-all.h"
22*32cad1ffSPhilippe Mathieu-Daudé #include "exec/page-protection.h"
23*32cad1ffSPhilippe Mathieu-Daudé #include "../internal.h"
24*32cad1ffSPhilippe Mathieu-Daudé
is_seg_am_mapped(unsigned int am,bool eu,int mmu_idx)25*32cad1ffSPhilippe Mathieu-Daudé static int is_seg_am_mapped(unsigned int am, bool eu, int mmu_idx)
26*32cad1ffSPhilippe Mathieu-Daudé {
27*32cad1ffSPhilippe Mathieu-Daudé /*
28*32cad1ffSPhilippe Mathieu-Daudé * Interpret access control mode and mmu_idx.
29*32cad1ffSPhilippe Mathieu-Daudé * AdE? TLB?
30*32cad1ffSPhilippe Mathieu-Daudé * AM K S U E K S U E
31*32cad1ffSPhilippe Mathieu-Daudé * UK 0 0 1 1 0 0 - - 0
32*32cad1ffSPhilippe Mathieu-Daudé * MK 1 0 1 1 0 1 - - !eu
33*32cad1ffSPhilippe Mathieu-Daudé * MSK 2 0 0 1 0 1 1 - !eu
34*32cad1ffSPhilippe Mathieu-Daudé * MUSK 3 0 0 0 0 1 1 1 !eu
35*32cad1ffSPhilippe Mathieu-Daudé * MUSUK 4 0 0 0 0 0 1 1 0
36*32cad1ffSPhilippe Mathieu-Daudé * USK 5 0 0 1 0 0 0 - 0
37*32cad1ffSPhilippe Mathieu-Daudé * - 6 - - - - - - - -
38*32cad1ffSPhilippe Mathieu-Daudé * UUSK 7 0 0 0 0 0 0 0 0
39*32cad1ffSPhilippe Mathieu-Daudé */
40*32cad1ffSPhilippe Mathieu-Daudé int32_t adetlb_mask;
41*32cad1ffSPhilippe Mathieu-Daudé
42*32cad1ffSPhilippe Mathieu-Daudé switch (mmu_idx) {
43*32cad1ffSPhilippe Mathieu-Daudé case 3: /* ERL */
44*32cad1ffSPhilippe Mathieu-Daudé /* If EU is set, always unmapped */
45*32cad1ffSPhilippe Mathieu-Daudé if (eu) {
46*32cad1ffSPhilippe Mathieu-Daudé return 0;
47*32cad1ffSPhilippe Mathieu-Daudé }
48*32cad1ffSPhilippe Mathieu-Daudé /* fall through */
49*32cad1ffSPhilippe Mathieu-Daudé case MIPS_HFLAG_KM:
50*32cad1ffSPhilippe Mathieu-Daudé /* Never AdE, TLB mapped if AM={1,2,3} */
51*32cad1ffSPhilippe Mathieu-Daudé adetlb_mask = 0x70000000;
52*32cad1ffSPhilippe Mathieu-Daudé goto check_tlb;
53*32cad1ffSPhilippe Mathieu-Daudé
54*32cad1ffSPhilippe Mathieu-Daudé case MIPS_HFLAG_SM:
55*32cad1ffSPhilippe Mathieu-Daudé /* AdE if AM={0,1}, TLB mapped if AM={2,3,4} */
56*32cad1ffSPhilippe Mathieu-Daudé adetlb_mask = 0xc0380000;
57*32cad1ffSPhilippe Mathieu-Daudé goto check_ade;
58*32cad1ffSPhilippe Mathieu-Daudé
59*32cad1ffSPhilippe Mathieu-Daudé case MIPS_HFLAG_UM:
60*32cad1ffSPhilippe Mathieu-Daudé /* AdE if AM={0,1,2,5}, TLB mapped if AM={3,4} */
61*32cad1ffSPhilippe Mathieu-Daudé adetlb_mask = 0xe4180000;
62*32cad1ffSPhilippe Mathieu-Daudé /* fall through */
63*32cad1ffSPhilippe Mathieu-Daudé check_ade:
64*32cad1ffSPhilippe Mathieu-Daudé /* does this AM cause AdE in current execution mode */
65*32cad1ffSPhilippe Mathieu-Daudé if ((adetlb_mask << am) < 0) {
66*32cad1ffSPhilippe Mathieu-Daudé return TLBRET_BADADDR;
67*32cad1ffSPhilippe Mathieu-Daudé }
68*32cad1ffSPhilippe Mathieu-Daudé adetlb_mask <<= 8;
69*32cad1ffSPhilippe Mathieu-Daudé /* fall through */
70*32cad1ffSPhilippe Mathieu-Daudé check_tlb:
71*32cad1ffSPhilippe Mathieu-Daudé /* is this AM mapped in current execution mode */
72*32cad1ffSPhilippe Mathieu-Daudé return ((adetlb_mask << am) < 0);
73*32cad1ffSPhilippe Mathieu-Daudé default:
74*32cad1ffSPhilippe Mathieu-Daudé g_assert_not_reached();
75*32cad1ffSPhilippe Mathieu-Daudé };
76*32cad1ffSPhilippe Mathieu-Daudé }
77*32cad1ffSPhilippe Mathieu-Daudé
get_seg_physical_address(CPUMIPSState * env,hwaddr * physical,int * prot,target_ulong real_address,MMUAccessType access_type,int mmu_idx,unsigned int am,bool eu,target_ulong segmask,hwaddr physical_base)78*32cad1ffSPhilippe Mathieu-Daudé static int get_seg_physical_address(CPUMIPSState *env, hwaddr *physical,
79*32cad1ffSPhilippe Mathieu-Daudé int *prot, target_ulong real_address,
80*32cad1ffSPhilippe Mathieu-Daudé MMUAccessType access_type, int mmu_idx,
81*32cad1ffSPhilippe Mathieu-Daudé unsigned int am, bool eu,
82*32cad1ffSPhilippe Mathieu-Daudé target_ulong segmask,
83*32cad1ffSPhilippe Mathieu-Daudé hwaddr physical_base)
84*32cad1ffSPhilippe Mathieu-Daudé {
85*32cad1ffSPhilippe Mathieu-Daudé int mapped = is_seg_am_mapped(am, eu, mmu_idx);
86*32cad1ffSPhilippe Mathieu-Daudé
87*32cad1ffSPhilippe Mathieu-Daudé if (mapped < 0) {
88*32cad1ffSPhilippe Mathieu-Daudé /* is_seg_am_mapped can report TLBRET_BADADDR */
89*32cad1ffSPhilippe Mathieu-Daudé return mapped;
90*32cad1ffSPhilippe Mathieu-Daudé } else if (mapped) {
91*32cad1ffSPhilippe Mathieu-Daudé /* The segment is TLB mapped */
92*32cad1ffSPhilippe Mathieu-Daudé return env->tlb->map_address(env, physical, prot, real_address,
93*32cad1ffSPhilippe Mathieu-Daudé access_type);
94*32cad1ffSPhilippe Mathieu-Daudé } else {
95*32cad1ffSPhilippe Mathieu-Daudé /* The segment is unmapped */
96*32cad1ffSPhilippe Mathieu-Daudé *physical = physical_base | (real_address & segmask);
97*32cad1ffSPhilippe Mathieu-Daudé *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
98*32cad1ffSPhilippe Mathieu-Daudé return TLBRET_MATCH;
99*32cad1ffSPhilippe Mathieu-Daudé }
100*32cad1ffSPhilippe Mathieu-Daudé }
101*32cad1ffSPhilippe Mathieu-Daudé
get_segctl_physical_address(CPUMIPSState * env,hwaddr * physical,int * prot,target_ulong real_address,MMUAccessType access_type,int mmu_idx,uint16_t segctl,target_ulong segmask)102*32cad1ffSPhilippe Mathieu-Daudé static int get_segctl_physical_address(CPUMIPSState *env, hwaddr *physical,
103*32cad1ffSPhilippe Mathieu-Daudé int *prot, target_ulong real_address,
104*32cad1ffSPhilippe Mathieu-Daudé MMUAccessType access_type, int mmu_idx,
105*32cad1ffSPhilippe Mathieu-Daudé uint16_t segctl, target_ulong segmask)
106*32cad1ffSPhilippe Mathieu-Daudé {
107*32cad1ffSPhilippe Mathieu-Daudé unsigned int am = (segctl & CP0SC_AM_MASK) >> CP0SC_AM;
108*32cad1ffSPhilippe Mathieu-Daudé bool eu = (segctl >> CP0SC_EU) & 1;
109*32cad1ffSPhilippe Mathieu-Daudé hwaddr pa = ((hwaddr)segctl & CP0SC_PA_MASK) << 20;
110*32cad1ffSPhilippe Mathieu-Daudé
111*32cad1ffSPhilippe Mathieu-Daudé return get_seg_physical_address(env, physical, prot, real_address,
112*32cad1ffSPhilippe Mathieu-Daudé access_type, mmu_idx, am, eu, segmask,
113*32cad1ffSPhilippe Mathieu-Daudé pa & ~(hwaddr)segmask);
114*32cad1ffSPhilippe Mathieu-Daudé }
115*32cad1ffSPhilippe Mathieu-Daudé
get_physical_address(CPUMIPSState * env,hwaddr * physical,int * prot,target_ulong real_address,MMUAccessType access_type,int mmu_idx)116*32cad1ffSPhilippe Mathieu-Daudé int get_physical_address(CPUMIPSState *env, hwaddr *physical,
117*32cad1ffSPhilippe Mathieu-Daudé int *prot, target_ulong real_address,
118*32cad1ffSPhilippe Mathieu-Daudé MMUAccessType access_type, int mmu_idx)
119*32cad1ffSPhilippe Mathieu-Daudé {
120*32cad1ffSPhilippe Mathieu-Daudé /* User mode can only access useg/xuseg */
121*32cad1ffSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64)
122*32cad1ffSPhilippe Mathieu-Daudé int user_mode = mmu_idx == MIPS_HFLAG_UM;
123*32cad1ffSPhilippe Mathieu-Daudé int supervisor_mode = mmu_idx == MIPS_HFLAG_SM;
124*32cad1ffSPhilippe Mathieu-Daudé int kernel_mode = !user_mode && !supervisor_mode;
125*32cad1ffSPhilippe Mathieu-Daudé int UX = (env->CP0_Status & (1 << CP0St_UX)) != 0;
126*32cad1ffSPhilippe Mathieu-Daudé int SX = (env->CP0_Status & (1 << CP0St_SX)) != 0;
127*32cad1ffSPhilippe Mathieu-Daudé int KX = (env->CP0_Status & (1 << CP0St_KX)) != 0;
128*32cad1ffSPhilippe Mathieu-Daudé #endif
129*32cad1ffSPhilippe Mathieu-Daudé int ret = TLBRET_MATCH;
130*32cad1ffSPhilippe Mathieu-Daudé /* effective address (modified for KVM T&E kernel segments) */
131*32cad1ffSPhilippe Mathieu-Daudé target_ulong address = real_address;
132*32cad1ffSPhilippe Mathieu-Daudé
133*32cad1ffSPhilippe Mathieu-Daudé if (address <= USEG_LIMIT) {
134*32cad1ffSPhilippe Mathieu-Daudé /* useg */
135*32cad1ffSPhilippe Mathieu-Daudé uint16_t segctl;
136*32cad1ffSPhilippe Mathieu-Daudé
137*32cad1ffSPhilippe Mathieu-Daudé if (address >= 0x40000000UL) {
138*32cad1ffSPhilippe Mathieu-Daudé segctl = env->CP0_SegCtl2;
139*32cad1ffSPhilippe Mathieu-Daudé } else {
140*32cad1ffSPhilippe Mathieu-Daudé segctl = env->CP0_SegCtl2 >> 16;
141*32cad1ffSPhilippe Mathieu-Daudé }
142*32cad1ffSPhilippe Mathieu-Daudé ret = get_segctl_physical_address(env, physical, prot,
143*32cad1ffSPhilippe Mathieu-Daudé real_address, access_type,
144*32cad1ffSPhilippe Mathieu-Daudé mmu_idx, segctl, 0x3FFFFFFF);
145*32cad1ffSPhilippe Mathieu-Daudé #if defined(TARGET_MIPS64)
146*32cad1ffSPhilippe Mathieu-Daudé } else if (address < 0x4000000000000000ULL) {
147*32cad1ffSPhilippe Mathieu-Daudé /* xuseg */
148*32cad1ffSPhilippe Mathieu-Daudé if (UX && address <= (0x3FFFFFFFFFFFFFFFULL & env->SEGMask)) {
149*32cad1ffSPhilippe Mathieu-Daudé ret = env->tlb->map_address(env, physical, prot,
150*32cad1ffSPhilippe Mathieu-Daudé real_address, access_type);
151*32cad1ffSPhilippe Mathieu-Daudé } else {
152*32cad1ffSPhilippe Mathieu-Daudé ret = TLBRET_BADADDR;
153*32cad1ffSPhilippe Mathieu-Daudé }
154*32cad1ffSPhilippe Mathieu-Daudé } else if (address < 0x8000000000000000ULL) {
155*32cad1ffSPhilippe Mathieu-Daudé /* xsseg */
156*32cad1ffSPhilippe Mathieu-Daudé if ((supervisor_mode || kernel_mode) &&
157*32cad1ffSPhilippe Mathieu-Daudé SX && address <= (0x7FFFFFFFFFFFFFFFULL & env->SEGMask)) {
158*32cad1ffSPhilippe Mathieu-Daudé ret = env->tlb->map_address(env, physical, prot,
159*32cad1ffSPhilippe Mathieu-Daudé real_address, access_type);
160*32cad1ffSPhilippe Mathieu-Daudé } else {
161*32cad1ffSPhilippe Mathieu-Daudé ret = TLBRET_BADADDR;
162*32cad1ffSPhilippe Mathieu-Daudé }
163*32cad1ffSPhilippe Mathieu-Daudé } else if (address < 0xC000000000000000ULL) {
164*32cad1ffSPhilippe Mathieu-Daudé /* xkphys */
165*32cad1ffSPhilippe Mathieu-Daudé if ((address & 0x07FFFFFFFFFFFFFFULL) <= env->PAMask) {
166*32cad1ffSPhilippe Mathieu-Daudé /* KX/SX/UX bit to check for each xkphys EVA access mode */
167*32cad1ffSPhilippe Mathieu-Daudé static const uint8_t am_ksux[8] = {
168*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_UK] = (1u << CP0St_KX),
169*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_MK] = (1u << CP0St_KX),
170*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_MSK] = (1u << CP0St_SX),
171*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_MUSK] = (1u << CP0St_UX),
172*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_MUSUK] = (1u << CP0St_UX),
173*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_USK] = (1u << CP0St_SX),
174*32cad1ffSPhilippe Mathieu-Daudé [6] = (1u << CP0St_KX),
175*32cad1ffSPhilippe Mathieu-Daudé [CP0SC_AM_UUSK] = (1u << CP0St_UX),
176*32cad1ffSPhilippe Mathieu-Daudé };
177*32cad1ffSPhilippe Mathieu-Daudé unsigned int am = CP0SC_AM_UK;
178*32cad1ffSPhilippe Mathieu-Daudé unsigned int xr = (env->CP0_SegCtl2 & CP0SC2_XR_MASK) >> CP0SC2_XR;
179*32cad1ffSPhilippe Mathieu-Daudé
180*32cad1ffSPhilippe Mathieu-Daudé if (xr & (1 << ((address >> 59) & 0x7))) {
181*32cad1ffSPhilippe Mathieu-Daudé am = (env->CP0_SegCtl1 & CP0SC1_XAM_MASK) >> CP0SC1_XAM;
182*32cad1ffSPhilippe Mathieu-Daudé }
183*32cad1ffSPhilippe Mathieu-Daudé /* Does CP0_Status.KX/SX/UX permit the access mode (am) */
184*32cad1ffSPhilippe Mathieu-Daudé if (env->CP0_Status & am_ksux[am]) {
185*32cad1ffSPhilippe Mathieu-Daudé ret = get_seg_physical_address(env, physical, prot,
186*32cad1ffSPhilippe Mathieu-Daudé real_address, access_type,
187*32cad1ffSPhilippe Mathieu-Daudé mmu_idx, am, false, env->PAMask,
188*32cad1ffSPhilippe Mathieu-Daudé 0);
189*32cad1ffSPhilippe Mathieu-Daudé } else {
190*32cad1ffSPhilippe Mathieu-Daudé ret = TLBRET_BADADDR;
191*32cad1ffSPhilippe Mathieu-Daudé }
192*32cad1ffSPhilippe Mathieu-Daudé } else {
193*32cad1ffSPhilippe Mathieu-Daudé ret = TLBRET_BADADDR;
194*32cad1ffSPhilippe Mathieu-Daudé }
195*32cad1ffSPhilippe Mathieu-Daudé } else if (address < 0xFFFFFFFF80000000ULL) {
196*32cad1ffSPhilippe Mathieu-Daudé /* xkseg */
197*32cad1ffSPhilippe Mathieu-Daudé if (kernel_mode && KX &&
198*32cad1ffSPhilippe Mathieu-Daudé address <= (0xFFFFFFFF7FFFFFFFULL & env->SEGMask)) {
199*32cad1ffSPhilippe Mathieu-Daudé ret = env->tlb->map_address(env, physical, prot,
200*32cad1ffSPhilippe Mathieu-Daudé real_address, access_type);
201*32cad1ffSPhilippe Mathieu-Daudé } else {
202*32cad1ffSPhilippe Mathieu-Daudé ret = TLBRET_BADADDR;
203*32cad1ffSPhilippe Mathieu-Daudé }
204*32cad1ffSPhilippe Mathieu-Daudé #endif
205*32cad1ffSPhilippe Mathieu-Daudé } else if (address < KSEG1_BASE) {
206*32cad1ffSPhilippe Mathieu-Daudé /* kseg0 */
207*32cad1ffSPhilippe Mathieu-Daudé ret = get_segctl_physical_address(env, physical, prot, real_address,
208*32cad1ffSPhilippe Mathieu-Daudé access_type, mmu_idx,
209*32cad1ffSPhilippe Mathieu-Daudé env->CP0_SegCtl1 >> 16, 0x1FFFFFFF);
210*32cad1ffSPhilippe Mathieu-Daudé } else if (address < KSEG2_BASE) {
211*32cad1ffSPhilippe Mathieu-Daudé /* kseg1 */
212*32cad1ffSPhilippe Mathieu-Daudé ret = get_segctl_physical_address(env, physical, prot, real_address,
213*32cad1ffSPhilippe Mathieu-Daudé access_type, mmu_idx,
214*32cad1ffSPhilippe Mathieu-Daudé env->CP0_SegCtl1, 0x1FFFFFFF);
215*32cad1ffSPhilippe Mathieu-Daudé } else if (address < KSEG3_BASE) {
216*32cad1ffSPhilippe Mathieu-Daudé /* sseg (kseg2) */
217*32cad1ffSPhilippe Mathieu-Daudé ret = get_segctl_physical_address(env, physical, prot, real_address,
218*32cad1ffSPhilippe Mathieu-Daudé access_type, mmu_idx,
219*32cad1ffSPhilippe Mathieu-Daudé env->CP0_SegCtl0 >> 16, 0x1FFFFFFF);
220*32cad1ffSPhilippe Mathieu-Daudé } else {
221*32cad1ffSPhilippe Mathieu-Daudé /*
222*32cad1ffSPhilippe Mathieu-Daudé * kseg3
223*32cad1ffSPhilippe Mathieu-Daudé * XXX: debug segment is not emulated
224*32cad1ffSPhilippe Mathieu-Daudé */
225*32cad1ffSPhilippe Mathieu-Daudé ret = get_segctl_physical_address(env, physical, prot, real_address,
226*32cad1ffSPhilippe Mathieu-Daudé access_type, mmu_idx,
227*32cad1ffSPhilippe Mathieu-Daudé env->CP0_SegCtl0, 0x1FFFFFFF);
228*32cad1ffSPhilippe Mathieu-Daudé }
229*32cad1ffSPhilippe Mathieu-Daudé return ret;
230*32cad1ffSPhilippe Mathieu-Daudé }
231*32cad1ffSPhilippe Mathieu-Daudé
mips_cpu_get_phys_page_debug(CPUState * cs,vaddr addr)232*32cad1ffSPhilippe Mathieu-Daudé hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
233*32cad1ffSPhilippe Mathieu-Daudé {
234*32cad1ffSPhilippe Mathieu-Daudé CPUMIPSState *env = cpu_env(cs);
235*32cad1ffSPhilippe Mathieu-Daudé hwaddr phys_addr;
236*32cad1ffSPhilippe Mathieu-Daudé int prot;
237*32cad1ffSPhilippe Mathieu-Daudé
238*32cad1ffSPhilippe Mathieu-Daudé if (get_physical_address(env, &phys_addr, &prot, addr, MMU_DATA_LOAD,
239*32cad1ffSPhilippe Mathieu-Daudé mips_env_mmu_index(env)) != 0) {
240*32cad1ffSPhilippe Mathieu-Daudé return -1;
241*32cad1ffSPhilippe Mathieu-Daudé }
242*32cad1ffSPhilippe Mathieu-Daudé return phys_addr;
243*32cad1ffSPhilippe Mathieu-Daudé }
244