1*85d8da3fSPhilippe Mathieu-Daudé /* 2*85d8da3fSPhilippe Mathieu-Daudé * QEMU MIPS address translation support 3*85d8da3fSPhilippe Mathieu-Daudé * 4*85d8da3fSPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 5*85d8da3fSPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 6*85d8da3fSPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 7*85d8da3fSPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8*85d8da3fSPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 9*85d8da3fSPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 10*85d8da3fSPhilippe Mathieu-Daudé * 11*85d8da3fSPhilippe Mathieu-Daudé * The above copyright notice and this permission notice shall be included in 12*85d8da3fSPhilippe Mathieu-Daudé * all copies or substantial portions of the Software. 13*85d8da3fSPhilippe Mathieu-Daudé * 14*85d8da3fSPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*85d8da3fSPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*85d8da3fSPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*85d8da3fSPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18*85d8da3fSPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 19*85d8da3fSPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 20*85d8da3fSPhilippe Mathieu-Daudé * THE SOFTWARE. 21*85d8da3fSPhilippe Mathieu-Daudé */ 22*85d8da3fSPhilippe Mathieu-Daudé 23*85d8da3fSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 24*85d8da3fSPhilippe Mathieu-Daudé #include "cpu.h" 25*85d8da3fSPhilippe Mathieu-Daudé 26*85d8da3fSPhilippe Mathieu-Daudé static int mips_um_ksegs; 27*85d8da3fSPhilippe Mathieu-Daudé 28*85d8da3fSPhilippe Mathieu-Daudé uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr) 29*85d8da3fSPhilippe Mathieu-Daudé { 30*85d8da3fSPhilippe Mathieu-Daudé return addr & 0x1fffffffll; 31*85d8da3fSPhilippe Mathieu-Daudé } 32*85d8da3fSPhilippe Mathieu-Daudé 33*85d8da3fSPhilippe Mathieu-Daudé uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr) 34*85d8da3fSPhilippe Mathieu-Daudé { 35*85d8da3fSPhilippe Mathieu-Daudé return addr | ~0x7fffffffll; 36*85d8da3fSPhilippe Mathieu-Daudé } 37*85d8da3fSPhilippe Mathieu-Daudé 38*85d8da3fSPhilippe Mathieu-Daudé uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr) 39*85d8da3fSPhilippe Mathieu-Daudé { 40*85d8da3fSPhilippe Mathieu-Daudé return addr | 0x40000000ll; 41*85d8da3fSPhilippe Mathieu-Daudé } 42*85d8da3fSPhilippe Mathieu-Daudé 43*85d8da3fSPhilippe Mathieu-Daudé uint64_t cpu_mips_kseg1_to_phys(void *opaque, uint64_t addr) 44*85d8da3fSPhilippe Mathieu-Daudé { 45*85d8da3fSPhilippe Mathieu-Daudé return addr & 0x1fffffffll; 46*85d8da3fSPhilippe Mathieu-Daudé } 47*85d8da3fSPhilippe Mathieu-Daudé 48*85d8da3fSPhilippe Mathieu-Daudé uint64_t cpu_mips_phys_to_kseg1(void *opaque, uint64_t addr) 49*85d8da3fSPhilippe Mathieu-Daudé { 50*85d8da3fSPhilippe Mathieu-Daudé return (addr & 0x1fffffffll) | 0xffffffffa0000000ll; 51*85d8da3fSPhilippe Mathieu-Daudé } 52*85d8da3fSPhilippe Mathieu-Daudé 53*85d8da3fSPhilippe Mathieu-Daudé bool mips_um_ksegs_enabled(void) 54*85d8da3fSPhilippe Mathieu-Daudé { 55*85d8da3fSPhilippe Mathieu-Daudé return mips_um_ksegs; 56*85d8da3fSPhilippe Mathieu-Daudé } 57*85d8da3fSPhilippe Mathieu-Daudé 58*85d8da3fSPhilippe Mathieu-Daudé void mips_um_ksegs_enable(void) 59*85d8da3fSPhilippe Mathieu-Daudé { 60*85d8da3fSPhilippe Mathieu-Daudé mips_um_ksegs = 1; 61*85d8da3fSPhilippe Mathieu-Daudé } 62