1c7a9ef75SPhilippe Mathieu-Daudégen = [ 2*3f7a9278SPhilippe Mathieu-Daudé decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'), 3*3f7a9278SPhilippe Mathieu-Daudé decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'), 4c7a9ef75SPhilippe Mathieu-Daudé decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'), 55f21f30dSPhilippe Mathieu-Daudé decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'), 6c7a9ef75SPhilippe Mathieu-Daudé] 7c7a9ef75SPhilippe Mathieu-Daudé 8abff1abfSPaolo Bonzinimips_ss = ss.source_set() 9c7a9ef75SPhilippe Mathieu-Daudémips_ss.add(gen) 10abff1abfSPaolo Bonzinimips_ss.add(files( 11abff1abfSPaolo Bonzini 'cpu.c', 128b7322adSPhilippe Mathieu-Daudé 'gdbstub.c', 138b7322adSPhilippe Mathieu-Daudé)) 148b7322adSPhilippe Mathieu-Daudémips_ss.add(when: 'CONFIG_TCG', if_true: files( 15abff1abfSPaolo Bonzini 'dsp_helper.c', 16abff1abfSPaolo Bonzini 'fpu_helper.c', 17abff1abfSPaolo Bonzini 'lmmi_helper.c', 18abff1abfSPaolo Bonzini 'msa_helper.c', 1980e64a38SPhilippe Mathieu-Daudé 'msa_translate.c', 20abff1abfSPaolo Bonzini 'op_helper.c', 21*3f7a9278SPhilippe Mathieu-Daudé 'rel6_translate.c', 224cb213dcSPhilippe Mathieu-Daudé 'tlb_helper.c', 23abff1abfSPaolo Bonzini 'translate.c', 24a685f7d0SPhilippe Mathieu-Daudé 'translate_addr_const.c', 25abff1abfSPaolo Bonzini)) 26abff1abfSPaolo Bonzinimips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c')) 27abff1abfSPaolo Bonzini 28abff1abfSPaolo Bonzinimips_softmmu_ss = ss.source_set() 29abff1abfSPaolo Bonzinimips_softmmu_ss.add(files( 302fd9c5adSPhilippe Mathieu-Daudé 'addr.c', 31abff1abfSPaolo Bonzini 'cp0_timer.c', 32abff1abfSPaolo Bonzini 'machine.c', 33abff1abfSPaolo Bonzini 'mips-semi.c', 34abff1abfSPaolo Bonzini)) 358b7322adSPhilippe Mathieu-Daudémips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files( 368b7322adSPhilippe Mathieu-Daudé 'cp0_helper.c', 378b7322adSPhilippe Mathieu-Daudé)) 38abff1abfSPaolo Bonzini 39abff1abfSPaolo Bonzinitarget_arch += {'mips': mips_ss} 40abff1abfSPaolo Bonzinitarget_softmmu_arch += {'mips': mips_softmmu_ss} 41