xref: /openbmc/qemu/target/loongarch/translate.h (revision 55394dcbec8f0c29c30e792c102a0edd50a52bf4)
1f8da88d7SSong Gao /* SPDX-License-Identifier: GPL-2.0-or-later */
2f8da88d7SSong Gao /*
3f8da88d7SSong Gao  * LoongArch translation routines.
4f8da88d7SSong Gao  *
5f8da88d7SSong Gao  * Copyright (c) 2021 Loongson Technology Corporation Limited
6f8da88d7SSong Gao  */
7f8da88d7SSong Gao 
8f8da88d7SSong Gao #ifndef TARGET_LOONGARCH_TRANSLATE_H
9f8da88d7SSong Gao #define TARGET_LOONGARCH_TRANSLATE_H
10f8da88d7SSong Gao 
11f8da88d7SSong Gao #include "exec/translator.h"
12f8da88d7SSong Gao 
13ec3a9518SSong Gao #define TRANS(NAME, AVAIL, FUNC, ...) \
14143d6785SSong Gao     static bool trans_##NAME(DisasContext *ctx, arg_##NAME * a) \
15ec3a9518SSong Gao     { return avail_##AVAIL(ctx) && FUNC(ctx, a, __VA_ARGS__); }
16ec3a9518SSong Gao 
17ec3a9518SSong Gao #define avail_ALL(C)   true
18c0c0461eSSong Gao #define avail_64(C)    (FIELD_EX32((C)->cpucfg1, CPUCFG1, ARCH) == \
19c0c0461eSSong Gao                         CPUCFG1_ARCH_LA64)
2095e2ca24SSong Gao #define avail_FP(C)    (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP))
2195e2ca24SSong Gao #define avail_FP_SP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_SP))
2295e2ca24SSong Gao #define avail_FP_DP(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, FP_DP))
2370c8d5eaSSong Gao #define avail_LSPW(C)  (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW))
24b139ddf1SSong Gao #define avail_LAM(C)   (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM))
25ebf288b4SSong Gao #define avail_LSX(C)   (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSX))
26*cf61aef3SSong Gao #define avail_LASX(C)  (FIELD_EX32((C)->cpucfg2, CPUCFG2, LASX))
27a380c6f1SSong Gao #define avail_IOCSR(C) (FIELD_EX32((C)->cpucfg1, CPUCFG1, IOCSR))
28143d6785SSong Gao 
29143d6785SSong Gao /*
30143d6785SSong Gao  * If an operation is being performed on less than TARGET_LONG_BITS,
31143d6785SSong Gao  * it may require the inputs to be sign- or zero-extended; which will
32143d6785SSong Gao  * depend on the exact operation being performed.
33143d6785SSong Gao  */
34143d6785SSong Gao typedef enum {
35143d6785SSong Gao     EXT_NONE,
36143d6785SSong Gao     EXT_SIGN,
37143d6785SSong Gao     EXT_ZERO,
38143d6785SSong Gao } DisasExtend;
39143d6785SSong Gao 
40f8da88d7SSong Gao typedef struct DisasContext {
41f8da88d7SSong Gao     DisasContextBase base;
42f8da88d7SSong Gao     target_ulong page_start;
43f8da88d7SSong Gao     uint32_t opcode;
44c8885b88SRui Wang     uint16_t mem_idx;
45c8885b88SRui Wang     uint16_t plv;
4657b4f1acSSong Gao     int vl;   /* Vector length */
47143d6785SSong Gao     TCGv zero;
4839665820SJiajie Chen     bool la64; /* LoongArch64 mode */
4939665820SJiajie Chen     bool va32; /* 32-bit virtual address */
50c0c0461eSSong Gao     uint32_t cpucfg1;
5195e2ca24SSong Gao     uint32_t cpucfg2;
52f8da88d7SSong Gao } DisasContext;
53f8da88d7SSong Gao 
54f8da88d7SSong Gao void generate_exception(DisasContext *ctx, int excp);
55f8da88d7SSong Gao 
56f8da88d7SSong Gao extern TCGv cpu_gpr[32], cpu_pc;
57f8da88d7SSong Gao extern TCGv_i32 cpu_fscr0;
58f8da88d7SSong Gao extern TCGv_i64 cpu_fpr[32];
59f8da88d7SSong Gao 
60f8da88d7SSong Gao #endif
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