1*0c9b437cSGustavo Romero /* 2*0c9b437cSGustavo Romero * ARM MemTag operation helpers. 3*0c9b437cSGustavo Romero * 4*0c9b437cSGustavo Romero * This code is licensed under the GNU GPL v2 or later. 5*0c9b437cSGustavo Romero * 6*0c9b437cSGustavo Romero * SPDX-License-Identifier: LGPL-2.1-or-later 7*0c9b437cSGustavo Romero */ 8*0c9b437cSGustavo Romero 9*0c9b437cSGustavo Romero #ifndef TARGET_ARM_MTE_H 10*0c9b437cSGustavo Romero #define TARGET_ARM_MTE_H 11*0c9b437cSGustavo Romero 12*0c9b437cSGustavo Romero #include "exec/mmu-access-type.h" 13*0c9b437cSGustavo Romero 14*0c9b437cSGustavo Romero /** 15*0c9b437cSGustavo Romero * allocation_tag_mem_probe: 16*0c9b437cSGustavo Romero * @env: the cpu environment 17*0c9b437cSGustavo Romero * @ptr_mmu_idx: the addressing regime to use for the virtual address 18*0c9b437cSGustavo Romero * @ptr: the virtual address for which to look up tag memory 19*0c9b437cSGustavo Romero * @ptr_access: the access to use for the virtual address 20*0c9b437cSGustavo Romero * @ptr_size: the number of bytes in the normal memory access 21*0c9b437cSGustavo Romero * @tag_access: the access to use for the tag memory 22*0c9b437cSGustavo Romero * @probe: true to merely probe, never taking an exception 23*0c9b437cSGustavo Romero * @ra: the return address for exception handling 24*0c9b437cSGustavo Romero * 25*0c9b437cSGustavo Romero * Our tag memory is formatted as a sequence of little-endian nibbles. 26*0c9b437cSGustavo Romero * That is, the byte at (addr >> (LOG2_TAG_GRANULE + 1)) contains two 27*0c9b437cSGustavo Romero * tags, with the tag at [3:0] for the lower addr and the tag at [7:4] 28*0c9b437cSGustavo Romero * for the higher addr. 29*0c9b437cSGustavo Romero * 30*0c9b437cSGustavo Romero * Here, resolve the physical address from the virtual address, and return 31*0c9b437cSGustavo Romero * a pointer to the corresponding tag byte. 32*0c9b437cSGustavo Romero * 33*0c9b437cSGustavo Romero * If there is no tag storage corresponding to @ptr, return NULL. 34*0c9b437cSGustavo Romero * 35*0c9b437cSGustavo Romero * If the page is inaccessible for @ptr_access, or has a watchpoint, there are 36*0c9b437cSGustavo Romero * three options: 37*0c9b437cSGustavo Romero * (1) probe = true, ra = 0 : pure probe -- we return NULL if the page is not 38*0c9b437cSGustavo Romero * accessible, and do not take watchpoint traps. The calling code must 39*0c9b437cSGustavo Romero * handle those cases in the right priority compared to MTE traps. 40*0c9b437cSGustavo Romero * (2) probe = false, ra = 0 : probe, no fault expected -- the caller guarantees 41*0c9b437cSGustavo Romero * that the page is going to be accessible. We will take watchpoint traps. 42*0c9b437cSGustavo Romero * (3) probe = false, ra != 0 : non-probe -- we will take both memory access 43*0c9b437cSGustavo Romero * traps and watchpoint traps. 44*0c9b437cSGustavo Romero * (probe = true, ra != 0 is invalid and will assert.) 45*0c9b437cSGustavo Romero */ 46*0c9b437cSGustavo Romero uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx, 47*0c9b437cSGustavo Romero uint64_t ptr, MMUAccessType ptr_access, 48*0c9b437cSGustavo Romero int ptr_size, MMUAccessType tag_access, 49*0c9b437cSGustavo Romero bool probe, uintptr_t ra); 50*0c9b437cSGustavo Romero 51*0c9b437cSGustavo Romero /** 52*0c9b437cSGustavo Romero * load_tag1 - Load 1 tag (nibble) from byte 53*0c9b437cSGustavo Romero * @ptr: The tagged address 54*0c9b437cSGustavo Romero * @mem: The tag address (packed, 2 tags in byte) 55*0c9b437cSGustavo Romero */ 56*0c9b437cSGustavo Romero int load_tag1(uint64_t ptr, uint8_t *mem); 57*0c9b437cSGustavo Romero 58*0c9b437cSGustavo Romero /** 59*0c9b437cSGustavo Romero * store_tag1 - Store 1 tag (nibble) into byte 60*0c9b437cSGustavo Romero * @ptr: The tagged address 61*0c9b437cSGustavo Romero * @mem: The tag address (packed, 2 tags in byte) 62*0c9b437cSGustavo Romero * @tag: The tag to be stored in the nibble 63*0c9b437cSGustavo Romero */ 64*0c9b437cSGustavo Romero void store_tag1(uint64_t ptr, uint8_t *mem, int tag); 65*0c9b437cSGustavo Romero 66*0c9b437cSGustavo Romero #endif /* TARGET_ARM_MTE_H */ 67