1*5be5df72SMarc-André Lureau /* SPDX-License-Identifier: BSD-3-Clause */ 2*5be5df72SMarc-André Lureau #ifndef _LINUX_FW_CFG_H 3*5be5df72SMarc-André Lureau #define _LINUX_FW_CFG_H 4*5be5df72SMarc-André Lureau 5*5be5df72SMarc-André Lureau #include "standard-headers/linux/types.h" 6*5be5df72SMarc-André Lureau 7*5be5df72SMarc-André Lureau #define FW_CFG_ACPI_DEVICE_ID "QEMU0002" 8*5be5df72SMarc-André Lureau 9*5be5df72SMarc-André Lureau /* selector key values for "well-known" fw_cfg entries */ 10*5be5df72SMarc-André Lureau #define FW_CFG_SIGNATURE 0x00 11*5be5df72SMarc-André Lureau #define FW_CFG_ID 0x01 12*5be5df72SMarc-André Lureau #define FW_CFG_UUID 0x02 13*5be5df72SMarc-André Lureau #define FW_CFG_RAM_SIZE 0x03 14*5be5df72SMarc-André Lureau #define FW_CFG_NOGRAPHIC 0x04 15*5be5df72SMarc-André Lureau #define FW_CFG_NB_CPUS 0x05 16*5be5df72SMarc-André Lureau #define FW_CFG_MACHINE_ID 0x06 17*5be5df72SMarc-André Lureau #define FW_CFG_KERNEL_ADDR 0x07 18*5be5df72SMarc-André Lureau #define FW_CFG_KERNEL_SIZE 0x08 19*5be5df72SMarc-André Lureau #define FW_CFG_KERNEL_CMDLINE 0x09 20*5be5df72SMarc-André Lureau #define FW_CFG_INITRD_ADDR 0x0a 21*5be5df72SMarc-André Lureau #define FW_CFG_INITRD_SIZE 0x0b 22*5be5df72SMarc-André Lureau #define FW_CFG_BOOT_DEVICE 0x0c 23*5be5df72SMarc-André Lureau #define FW_CFG_NUMA 0x0d 24*5be5df72SMarc-André Lureau #define FW_CFG_BOOT_MENU 0x0e 25*5be5df72SMarc-André Lureau #define FW_CFG_MAX_CPUS 0x0f 26*5be5df72SMarc-André Lureau #define FW_CFG_KERNEL_ENTRY 0x10 27*5be5df72SMarc-André Lureau #define FW_CFG_KERNEL_DATA 0x11 28*5be5df72SMarc-André Lureau #define FW_CFG_INITRD_DATA 0x12 29*5be5df72SMarc-André Lureau #define FW_CFG_CMDLINE_ADDR 0x13 30*5be5df72SMarc-André Lureau #define FW_CFG_CMDLINE_SIZE 0x14 31*5be5df72SMarc-André Lureau #define FW_CFG_CMDLINE_DATA 0x15 32*5be5df72SMarc-André Lureau #define FW_CFG_SETUP_ADDR 0x16 33*5be5df72SMarc-André Lureau #define FW_CFG_SETUP_SIZE 0x17 34*5be5df72SMarc-André Lureau #define FW_CFG_SETUP_DATA 0x18 35*5be5df72SMarc-André Lureau #define FW_CFG_FILE_DIR 0x19 36*5be5df72SMarc-André Lureau 37*5be5df72SMarc-André Lureau #define FW_CFG_FILE_FIRST 0x20 38*5be5df72SMarc-André Lureau #define FW_CFG_FILE_SLOTS_MIN 0x10 39*5be5df72SMarc-André Lureau 40*5be5df72SMarc-André Lureau #define FW_CFG_WRITE_CHANNEL 0x4000 41*5be5df72SMarc-André Lureau #define FW_CFG_ARCH_LOCAL 0x8000 42*5be5df72SMarc-André Lureau #define FW_CFG_ENTRY_MASK (~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL)) 43*5be5df72SMarc-André Lureau 44*5be5df72SMarc-André Lureau #define FW_CFG_INVALID 0xffff 45*5be5df72SMarc-André Lureau 46*5be5df72SMarc-André Lureau /* width in bytes of fw_cfg control register */ 47*5be5df72SMarc-André Lureau #define FW_CFG_CTL_SIZE 0x02 48*5be5df72SMarc-André Lureau 49*5be5df72SMarc-André Lureau /* fw_cfg "file name" is up to 56 characters (including terminating nul) */ 50*5be5df72SMarc-André Lureau #define FW_CFG_MAX_FILE_PATH 56 51*5be5df72SMarc-André Lureau 52*5be5df72SMarc-André Lureau /* size in bytes of fw_cfg signature */ 53*5be5df72SMarc-André Lureau #define FW_CFG_SIG_SIZE 4 54*5be5df72SMarc-André Lureau 55*5be5df72SMarc-André Lureau /* FW_CFG_ID bits */ 56*5be5df72SMarc-André Lureau #define FW_CFG_VERSION 0x01 57*5be5df72SMarc-André Lureau #define FW_CFG_VERSION_DMA 0x02 58*5be5df72SMarc-André Lureau 59*5be5df72SMarc-André Lureau /* fw_cfg file directory entry type */ 60*5be5df72SMarc-André Lureau struct fw_cfg_file { 61*5be5df72SMarc-André Lureau uint32_t size; 62*5be5df72SMarc-André Lureau uint16_t select; 63*5be5df72SMarc-André Lureau uint16_t reserved; 64*5be5df72SMarc-André Lureau char name[FW_CFG_MAX_FILE_PATH]; 65*5be5df72SMarc-André Lureau }; 66*5be5df72SMarc-André Lureau 67*5be5df72SMarc-André Lureau /* FW_CFG_DMA_CONTROL bits */ 68*5be5df72SMarc-André Lureau #define FW_CFG_DMA_CTL_ERROR 0x01 69*5be5df72SMarc-André Lureau #define FW_CFG_DMA_CTL_READ 0x02 70*5be5df72SMarc-André Lureau #define FW_CFG_DMA_CTL_SKIP 0x04 71*5be5df72SMarc-André Lureau #define FW_CFG_DMA_CTL_SELECT 0x08 72*5be5df72SMarc-André Lureau #define FW_CFG_DMA_CTL_WRITE 0x10 73*5be5df72SMarc-André Lureau 74*5be5df72SMarc-André Lureau #define FW_CFG_DMA_SIGNATURE 0x51454d5520434647ULL /* "QEMU CFG" */ 75*5be5df72SMarc-André Lureau 76*5be5df72SMarc-André Lureau /* Control as first field allows for different structures selected by this 77*5be5df72SMarc-André Lureau * field, which might be useful in the future 78*5be5df72SMarc-André Lureau */ 79*5be5df72SMarc-André Lureau struct fw_cfg_dma_access { 80*5be5df72SMarc-André Lureau uint32_t control; 81*5be5df72SMarc-André Lureau uint32_t length; 82*5be5df72SMarc-André Lureau uint64_t address; 83*5be5df72SMarc-André Lureau }; 84*5be5df72SMarc-André Lureau 85*5be5df72SMarc-André Lureau #define FW_CFG_VMCOREINFO_FILENAME "etc/vmcoreinfo" 86*5be5df72SMarc-André Lureau 87*5be5df72SMarc-André Lureau #define FW_CFG_VMCOREINFO_FORMAT_NONE 0x0 88*5be5df72SMarc-André Lureau #define FW_CFG_VMCOREINFO_FORMAT_ELF 0x1 89*5be5df72SMarc-André Lureau 90*5be5df72SMarc-André Lureau struct fw_cfg_vmcoreinfo { 91*5be5df72SMarc-André Lureau uint16_t host_format; 92*5be5df72SMarc-André Lureau uint16_t guest_format; 93*5be5df72SMarc-André Lureau uint32_t size; 94*5be5df72SMarc-André Lureau uint64_t paddr; 95*5be5df72SMarc-André Lureau }; 96*5be5df72SMarc-André Lureau 97*5be5df72SMarc-André Lureau #endif 98