xref: /openbmc/qemu/subprojects/libvduse/linux-headers/linux/psci.h (revision 9f2d175db5c29b23bc1a560041043d0b10ee57dc)
1dd873966SEric Auger /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2b061808dSAlexander Graf /*
3b061808dSAlexander Graf  * ARM Power State and Coordination Interface (PSCI) header
4b061808dSAlexander Graf  *
5b061808dSAlexander Graf  * This header holds common PSCI defines and macros shared
6b061808dSAlexander Graf  * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space.
7b061808dSAlexander Graf  *
8b061808dSAlexander Graf  * Copyright (C) 2014 Linaro Ltd.
9b061808dSAlexander Graf  * Author: Anup Patel <anup.patel@linaro.org>
10b061808dSAlexander Graf  */
11b061808dSAlexander Graf 
12b061808dSAlexander Graf #ifndef _LINUX_PSCI_H
13b061808dSAlexander Graf #define _LINUX_PSCI_H
14b061808dSAlexander Graf 
15b061808dSAlexander Graf /*
16b061808dSAlexander Graf  * PSCI v0.1 interface
17b061808dSAlexander Graf  *
18b061808dSAlexander Graf  * The PSCI v0.1 function numbers are implementation defined.
19b061808dSAlexander Graf  *
20b061808dSAlexander Graf  * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED,
21b061808dSAlexander Graf  * INVALID_PARAMS, and DENIED defined below are applicable
22b061808dSAlexander Graf  * to PSCI v0.1.
23b061808dSAlexander Graf  */
24b061808dSAlexander Graf 
25b061808dSAlexander Graf /* PSCI v0.2 interface */
26b061808dSAlexander Graf #define PSCI_0_2_FN_BASE			0x84000000
27b061808dSAlexander Graf #define PSCI_0_2_FN(n)				(PSCI_0_2_FN_BASE + (n))
28b061808dSAlexander Graf #define PSCI_0_2_64BIT				0x40000000
29b061808dSAlexander Graf #define PSCI_0_2_FN64_BASE			\
30b061808dSAlexander Graf 					(PSCI_0_2_FN_BASE + PSCI_0_2_64BIT)
31b061808dSAlexander Graf #define PSCI_0_2_FN64(n)			(PSCI_0_2_FN64_BASE + (n))
32b061808dSAlexander Graf 
33b061808dSAlexander Graf #define PSCI_0_2_FN_PSCI_VERSION		PSCI_0_2_FN(0)
34b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_SUSPEND			PSCI_0_2_FN(1)
35b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_OFF			PSCI_0_2_FN(2)
36b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_ON			PSCI_0_2_FN(3)
37b061808dSAlexander Graf #define PSCI_0_2_FN_AFFINITY_INFO		PSCI_0_2_FN(4)
38b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE			PSCI_0_2_FN(5)
39b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_TYPE		PSCI_0_2_FN(6)
40b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU		PSCI_0_2_FN(7)
41b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_OFF			PSCI_0_2_FN(8)
42b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_RESET		PSCI_0_2_FN(9)
43b061808dSAlexander Graf 
44b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_SUSPEND		PSCI_0_2_FN64(1)
45b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_ON			PSCI_0_2_FN64(3)
46b061808dSAlexander Graf #define PSCI_0_2_FN64_AFFINITY_INFO		PSCI_0_2_FN64(4)
47b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE			PSCI_0_2_FN64(5)
48b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	PSCI_0_2_FN64(7)
49b061808dSAlexander Graf 
50fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_PSCI_FEATURES		PSCI_0_2_FN(10)
51fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_SYSTEM_SUSPEND		PSCI_0_2_FN(14)
52fff02bc0SPaolo Bonzini 
53fff02bc0SPaolo Bonzini #define PSCI_1_0_FN64_SYSTEM_SUSPEND		PSCI_0_2_FN64(14)
54fff02bc0SPaolo Bonzini 
55b061808dSAlexander Graf /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
56b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_MASK		0xffff
57b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_SHIFT		0
58b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_SHIFT		16
59b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_MASK		\
60b061808dSAlexander Graf 				(0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT)
61b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_SHIFT		24
62b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_MASK		\
63b061808dSAlexander Graf 				(0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
64b061808dSAlexander Graf 
65fff02bc0SPaolo Bonzini /* PSCI extended power state encoding for CPU_SUSPEND function */
66fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_MASK	0xfffffff
67fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT	0
68fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT	30
69fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK	\
70fff02bc0SPaolo Bonzini 				(0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT)
71fff02bc0SPaolo Bonzini 
72b061808dSAlexander Graf /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
73b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON		0
74b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_OFF		1
75b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING	2
76b061808dSAlexander Graf 
77b061808dSAlexander Graf /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */
78b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_MIGRATE			0
79b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_NO_MIGRATE		1
80b061808dSAlexander Graf #define PSCI_0_2_TOS_MP				2
81b061808dSAlexander Graf 
82b061808dSAlexander Graf /* PSCI version decoding (independent of PSCI version) */
83b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_SHIFT		16
84b061808dSAlexander Graf #define PSCI_VERSION_MINOR_MASK			\
85b061808dSAlexander Graf 		((1U << PSCI_VERSION_MAJOR_SHIFT) - 1)
86b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_MASK			~PSCI_VERSION_MINOR_MASK
87b061808dSAlexander Graf #define PSCI_VERSION_MAJOR(ver)			\
88b061808dSAlexander Graf 		(((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT)
89b061808dSAlexander Graf #define PSCI_VERSION_MINOR(ver)			\
90b061808dSAlexander Graf 		((ver) & PSCI_VERSION_MINOR_MASK)
91*9f2d175dSPaolo Bonzini #define PSCI_VERSION(maj, min)						\
92*9f2d175dSPaolo Bonzini 	((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \
93*9f2d175dSPaolo Bonzini 	 ((min) & PSCI_VERSION_MINOR_MASK))
94b061808dSAlexander Graf 
95fff02bc0SPaolo Bonzini /* PSCI features decoding (>=1.0) */
96fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT	1
97fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK	\
98fff02bc0SPaolo Bonzini 			(0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT)
99fff02bc0SPaolo Bonzini 
100b061808dSAlexander Graf /* PSCI return values (inclusive of all PSCI versions) */
101b061808dSAlexander Graf #define PSCI_RET_SUCCESS			0
102b061808dSAlexander Graf #define PSCI_RET_NOT_SUPPORTED			-1
103b061808dSAlexander Graf #define PSCI_RET_INVALID_PARAMS			-2
104b061808dSAlexander Graf #define PSCI_RET_DENIED				-3
105b061808dSAlexander Graf #define PSCI_RET_ALREADY_ON			-4
106b061808dSAlexander Graf #define PSCI_RET_ON_PENDING			-5
107b061808dSAlexander Graf #define PSCI_RET_INTERNAL_FAILURE		-6
108b061808dSAlexander Graf #define PSCI_RET_NOT_PRESENT			-7
109b061808dSAlexander Graf #define PSCI_RET_DISABLED			-8
110fff02bc0SPaolo Bonzini #define PSCI_RET_INVALID_ADDRESS		-9
111b061808dSAlexander Graf 
112b061808dSAlexander Graf #endif /* _LINUX_PSCI_H */
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