1dd873966SEric Auger /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2b061808dSAlexander Graf /* 3b061808dSAlexander Graf * ARM Power State and Coordination Interface (PSCI) header 4b061808dSAlexander Graf * 5b061808dSAlexander Graf * This header holds common PSCI defines and macros shared 6b061808dSAlexander Graf * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. 7b061808dSAlexander Graf * 8b061808dSAlexander Graf * Copyright (C) 2014 Linaro Ltd. 9b061808dSAlexander Graf * Author: Anup Patel <anup.patel@linaro.org> 10b061808dSAlexander Graf */ 11b061808dSAlexander Graf 12b061808dSAlexander Graf #ifndef _LINUX_PSCI_H 13b061808dSAlexander Graf #define _LINUX_PSCI_H 14b061808dSAlexander Graf 15b061808dSAlexander Graf /* 16b061808dSAlexander Graf * PSCI v0.1 interface 17b061808dSAlexander Graf * 18b061808dSAlexander Graf * The PSCI v0.1 function numbers are implementation defined. 19b061808dSAlexander Graf * 20b061808dSAlexander Graf * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, 21b061808dSAlexander Graf * INVALID_PARAMS, and DENIED defined below are applicable 22b061808dSAlexander Graf * to PSCI v0.1. 23b061808dSAlexander Graf */ 24b061808dSAlexander Graf 25b061808dSAlexander Graf /* PSCI v0.2 interface */ 26b061808dSAlexander Graf #define PSCI_0_2_FN_BASE 0x84000000 27b061808dSAlexander Graf #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) 28b061808dSAlexander Graf #define PSCI_0_2_64BIT 0x40000000 29b061808dSAlexander Graf #define PSCI_0_2_FN64_BASE \ 30b061808dSAlexander Graf (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) 31b061808dSAlexander Graf #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) 32b061808dSAlexander Graf 33b061808dSAlexander Graf #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) 34b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) 35b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) 36b061808dSAlexander Graf #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) 37b061808dSAlexander Graf #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) 38b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) 39b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) 40b061808dSAlexander Graf #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) 41b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) 42b061808dSAlexander Graf #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) 43b061808dSAlexander Graf 44b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) 45b061808dSAlexander Graf #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) 46b061808dSAlexander Graf #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) 47b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) 48b061808dSAlexander Graf #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) 49b061808dSAlexander Graf 50fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) 51*93e0932bSPeter Xu #define PSCI_1_0_FN_CPU_FREEZE PSCI_0_2_FN(11) 52*93e0932bSPeter Xu #define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND PSCI_0_2_FN(12) 53*93e0932bSPeter Xu #define PSCI_1_0_FN_NODE_HW_STATE PSCI_0_2_FN(13) 54fff02bc0SPaolo Bonzini #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) 55d9cb4336SCornelia Huck #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) 56*93e0932bSPeter Xu #define PSCI_1_0_FN_STAT_RESIDENCY PSCI_0_2_FN(16) 57*93e0932bSPeter Xu #define PSCI_1_0_FN_STAT_COUNT PSCI_0_2_FN(17) 58fff02bc0SPaolo Bonzini 59*93e0932bSPeter Xu #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) 60*93e0932bSPeter Xu #define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19) 61*93e0932bSPeter Xu #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(19) 62*93e0932bSPeter Xu 63*93e0932bSPeter Xu #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12) 64*93e0932bSPeter Xu #define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13) 65fff02bc0SPaolo Bonzini #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) 66*93e0932bSPeter Xu #define PSCI_1_0_FN64_STAT_RESIDENCY PSCI_0_2_FN64(16) 67*93e0932bSPeter Xu #define PSCI_1_0_FN64_STAT_COUNT PSCI_0_2_FN64(17) 68*93e0932bSPeter Xu 69d9cb4336SCornelia Huck #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) 70*93e0932bSPeter Xu #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(19) 71fff02bc0SPaolo Bonzini 72b061808dSAlexander Graf /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ 73b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff 74b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 75b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 76b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_TYPE_MASK \ 77b061808dSAlexander Graf (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) 78b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 79b061808dSAlexander Graf #define PSCI_0_2_POWER_STATE_AFFL_MASK \ 80b061808dSAlexander Graf (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) 81b061808dSAlexander Graf 82fff02bc0SPaolo Bonzini /* PSCI extended power state encoding for CPU_SUSPEND function */ 83fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff 84fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 85fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 86fff02bc0SPaolo Bonzini #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ 87fff02bc0SPaolo Bonzini (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) 88fff02bc0SPaolo Bonzini 89b061808dSAlexander Graf /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ 90b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON 0 91b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 92b061808dSAlexander Graf #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 93b061808dSAlexander Graf 94b061808dSAlexander Graf /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ 95b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_MIGRATE 0 96b061808dSAlexander Graf #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 97b061808dSAlexander Graf #define PSCI_0_2_TOS_MP 2 98b061808dSAlexander Graf 99e4082063SAlex Williamson /* PSCI v1.1 reset type encoding for SYSTEM_RESET2 */ 100e4082063SAlex Williamson #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 101e4082063SAlex Williamson #define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U 102e4082063SAlex Williamson 103b061808dSAlexander Graf /* PSCI version decoding (independent of PSCI version) */ 104b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_SHIFT 16 105b061808dSAlexander Graf #define PSCI_VERSION_MINOR_MASK \ 106b061808dSAlexander Graf ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) 107b061808dSAlexander Graf #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK 108b061808dSAlexander Graf #define PSCI_VERSION_MAJOR(ver) \ 109b061808dSAlexander Graf (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) 110b061808dSAlexander Graf #define PSCI_VERSION_MINOR(ver) \ 111b061808dSAlexander Graf ((ver) & PSCI_VERSION_MINOR_MASK) 1129f2d175dSPaolo Bonzini #define PSCI_VERSION(maj, min) \ 1139f2d175dSPaolo Bonzini ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ 1149f2d175dSPaolo Bonzini ((min) & PSCI_VERSION_MINOR_MASK)) 115b061808dSAlexander Graf 116fff02bc0SPaolo Bonzini /* PSCI features decoding (>=1.0) */ 117fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 118fff02bc0SPaolo Bonzini #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ 119fff02bc0SPaolo Bonzini (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) 120fff02bc0SPaolo Bonzini 121d9cb4336SCornelia Huck #define PSCI_1_0_OS_INITIATED BIT(0) 122d9cb4336SCornelia Huck #define PSCI_1_0_SUSPEND_MODE_PC 0 123d9cb4336SCornelia Huck #define PSCI_1_0_SUSPEND_MODE_OSI 1 124d9cb4336SCornelia Huck 125b061808dSAlexander Graf /* PSCI return values (inclusive of all PSCI versions) */ 126b061808dSAlexander Graf #define PSCI_RET_SUCCESS 0 127b061808dSAlexander Graf #define PSCI_RET_NOT_SUPPORTED -1 128b061808dSAlexander Graf #define PSCI_RET_INVALID_PARAMS -2 129b061808dSAlexander Graf #define PSCI_RET_DENIED -3 130b061808dSAlexander Graf #define PSCI_RET_ALREADY_ON -4 131b061808dSAlexander Graf #define PSCI_RET_ON_PENDING -5 132b061808dSAlexander Graf #define PSCI_RET_INTERNAL_FAILURE -6 133b061808dSAlexander Graf #define PSCI_RET_NOT_PRESENT -7 134b061808dSAlexander Graf #define PSCI_RET_DISABLED -8 135fff02bc0SPaolo Bonzini #define PSCI_RET_INVALID_ADDRESS -9 136b061808dSAlexander Graf 137b061808dSAlexander Graf #endif /* _LINUX_PSCI_H */ 138