xref: /openbmc/qemu/linux-user/riscv/cpu_loop.c (revision 3109cd98a6c0c618189b38a83a8aa29cb20acbce)
1cd71c089SLaurent Vivier /*
2cd71c089SLaurent Vivier  *  qemu user cpu loop
3cd71c089SLaurent Vivier  *
4cd71c089SLaurent Vivier  *  Copyright (c) 2003-2008 Fabrice Bellard
5cd71c089SLaurent Vivier  *
6cd71c089SLaurent Vivier  *  This program is free software; you can redistribute it and/or modify
7cd71c089SLaurent Vivier  *  it under the terms of the GNU General Public License as published by
8cd71c089SLaurent Vivier  *  the Free Software Foundation; either version 2 of the License, or
9cd71c089SLaurent Vivier  *  (at your option) any later version.
10cd71c089SLaurent Vivier  *
11cd71c089SLaurent Vivier  *  This program is distributed in the hope that it will be useful,
12cd71c089SLaurent Vivier  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13cd71c089SLaurent Vivier  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14cd71c089SLaurent Vivier  *  GNU General Public License for more details.
15cd71c089SLaurent Vivier  *
16cd71c089SLaurent Vivier  *  You should have received a copy of the GNU General Public License
17cd71c089SLaurent Vivier  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
18cd71c089SLaurent Vivier  */
19cd71c089SLaurent Vivier 
20cd71c089SLaurent Vivier #include "qemu/osdep.h"
215836c3ecSKito Cheng #include "qemu/error-report.h"
22cd71c089SLaurent Vivier #include "qemu.h"
23cd71c089SLaurent Vivier #include "cpu_loop-common.h"
245836c3ecSKito Cheng #include "elf.h"
25cd71c089SLaurent Vivier 
265a0b6d22SLaurent Vivier void cpu_loop(CPURISCVState *env)
275a0b6d22SLaurent Vivier {
28*3109cd98SRichard Henderson     CPUState *cs = env_cpu(env);
295a0b6d22SLaurent Vivier     int trapnr, signum, sigcode;
305a0b6d22SLaurent Vivier     target_ulong sigaddr;
315a0b6d22SLaurent Vivier     target_ulong ret;
325a0b6d22SLaurent Vivier 
335a0b6d22SLaurent Vivier     for (;;) {
345a0b6d22SLaurent Vivier         cpu_exec_start(cs);
355a0b6d22SLaurent Vivier         trapnr = cpu_exec(cs);
365a0b6d22SLaurent Vivier         cpu_exec_end(cs);
375a0b6d22SLaurent Vivier         process_queued_cpu_work(cs);
385a0b6d22SLaurent Vivier 
395a0b6d22SLaurent Vivier         signum = 0;
405a0b6d22SLaurent Vivier         sigcode = 0;
415a0b6d22SLaurent Vivier         sigaddr = 0;
425a0b6d22SLaurent Vivier 
435a0b6d22SLaurent Vivier         switch (trapnr) {
445a0b6d22SLaurent Vivier         case EXCP_INTERRUPT:
455a0b6d22SLaurent Vivier             /* just indicate that signals should be handled asap */
465a0b6d22SLaurent Vivier             break;
475a0b6d22SLaurent Vivier         case EXCP_ATOMIC:
485a0b6d22SLaurent Vivier             cpu_exec_step_atomic(cs);
495a0b6d22SLaurent Vivier             break;
505a0b6d22SLaurent Vivier         case RISCV_EXCP_U_ECALL:
515a0b6d22SLaurent Vivier             env->pc += 4;
525a0b6d22SLaurent Vivier             if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) {
535a0b6d22SLaurent Vivier                 /* riscv_flush_icache_syscall is a no-op in QEMU as
545a0b6d22SLaurent Vivier                    self-modifying code is automatically detected */
555a0b6d22SLaurent Vivier                 ret = 0;
565a0b6d22SLaurent Vivier             } else {
575a0b6d22SLaurent Vivier                 ret = do_syscall(env,
585836c3ecSKito Cheng                                  env->gpr[(env->elf_flags & EF_RISCV_RVE)
595836c3ecSKito Cheng                                     ? xT0 : xA7],
605a0b6d22SLaurent Vivier                                  env->gpr[xA0],
615a0b6d22SLaurent Vivier                                  env->gpr[xA1],
625a0b6d22SLaurent Vivier                                  env->gpr[xA2],
635a0b6d22SLaurent Vivier                                  env->gpr[xA3],
645a0b6d22SLaurent Vivier                                  env->gpr[xA4],
655a0b6d22SLaurent Vivier                                  env->gpr[xA5],
665a0b6d22SLaurent Vivier                                  0, 0);
675a0b6d22SLaurent Vivier             }
685a0b6d22SLaurent Vivier             if (ret == -TARGET_ERESTARTSYS) {
695a0b6d22SLaurent Vivier                 env->pc -= 4;
705a0b6d22SLaurent Vivier             } else if (ret != -TARGET_QEMU_ESIGRETURN) {
715a0b6d22SLaurent Vivier                 env->gpr[xA0] = ret;
725a0b6d22SLaurent Vivier             }
735a0b6d22SLaurent Vivier             if (cs->singlestep_enabled) {
745a0b6d22SLaurent Vivier                 goto gdbstep;
755a0b6d22SLaurent Vivier             }
765a0b6d22SLaurent Vivier             break;
775a0b6d22SLaurent Vivier         case RISCV_EXCP_ILLEGAL_INST:
785a0b6d22SLaurent Vivier             signum = TARGET_SIGILL;
795a0b6d22SLaurent Vivier             sigcode = TARGET_ILL_ILLOPC;
805a0b6d22SLaurent Vivier             break;
815a0b6d22SLaurent Vivier         case RISCV_EXCP_BREAKPOINT:
825a0b6d22SLaurent Vivier             signum = TARGET_SIGTRAP;
835a0b6d22SLaurent Vivier             sigcode = TARGET_TRAP_BRKPT;
845a0b6d22SLaurent Vivier             sigaddr = env->pc;
855a0b6d22SLaurent Vivier             break;
865a0b6d22SLaurent Vivier         case RISCV_EXCP_INST_PAGE_FAULT:
875a0b6d22SLaurent Vivier         case RISCV_EXCP_LOAD_PAGE_FAULT:
885a0b6d22SLaurent Vivier         case RISCV_EXCP_STORE_PAGE_FAULT:
895a0b6d22SLaurent Vivier             signum = TARGET_SIGSEGV;
905a0b6d22SLaurent Vivier             sigcode = TARGET_SEGV_MAPERR;
915a0b6d22SLaurent Vivier             break;
925a0b6d22SLaurent Vivier         case EXCP_DEBUG:
935a0b6d22SLaurent Vivier         gdbstep:
94b10089a1SPeter Maydell             signum = TARGET_SIGTRAP;
955a0b6d22SLaurent Vivier             sigcode = TARGET_TRAP_BRKPT;
965a0b6d22SLaurent Vivier             break;
975a0b6d22SLaurent Vivier         default:
985a0b6d22SLaurent Vivier             EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
995a0b6d22SLaurent Vivier                      trapnr);
1005a0b6d22SLaurent Vivier             exit(EXIT_FAILURE);
1015a0b6d22SLaurent Vivier         }
1025a0b6d22SLaurent Vivier 
1035a0b6d22SLaurent Vivier         if (signum) {
1045a0b6d22SLaurent Vivier             target_siginfo_t info = {
1055a0b6d22SLaurent Vivier                 .si_signo = signum,
1065a0b6d22SLaurent Vivier                 .si_errno = 0,
1075a0b6d22SLaurent Vivier                 .si_code = sigcode,
1085a0b6d22SLaurent Vivier                 ._sifields._sigfault._addr = sigaddr
1095a0b6d22SLaurent Vivier             };
1105a0b6d22SLaurent Vivier             queue_signal(env, info.si_signo, QEMU_SI_KILL, &info);
1115a0b6d22SLaurent Vivier         }
1125a0b6d22SLaurent Vivier 
1135a0b6d22SLaurent Vivier         process_pending_signals(env);
1145a0b6d22SLaurent Vivier     }
1155a0b6d22SLaurent Vivier }
1165a0b6d22SLaurent Vivier 
117cd71c089SLaurent Vivier void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
118cd71c089SLaurent Vivier {
11929a0af61SRichard Henderson     CPUState *cpu = env_cpu(env);
1205836c3ecSKito Cheng     TaskState *ts = cpu->opaque;
1215836c3ecSKito Cheng     struct image_info *info = ts->info;
1225836c3ecSKito Cheng 
1235a0b6d22SLaurent Vivier     env->pc = regs->sepc;
1245a0b6d22SLaurent Vivier     env->gpr[xSP] = regs->sp;
1255836c3ecSKito Cheng     env->elf_flags = info->elf_flags;
1265836c3ecSKito Cheng 
1275836c3ecSKito Cheng     if ((env->misa & RVE) && !(env->elf_flags & EF_RISCV_RVE)) {
1285836c3ecSKito Cheng         error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
1295836c3ecSKito Cheng         exit(EXIT_FAILURE);
1305836c3ecSKito Cheng     }
131cd71c089SLaurent Vivier }
132