1e34136d9SRichard Henderson/* 2e34136d9SRichard Henderson * PowerPC linux replacement vdso. 3e34136d9SRichard Henderson * 4e34136d9SRichard Henderson * Copyright 2023 Linaro, Ltd. 5e34136d9SRichard Henderson * 6e34136d9SRichard Henderson * SPDX-License-Identifier: GPL-2.0-or-later 7e34136d9SRichard Henderson */ 8e34136d9SRichard Henderson 9e34136d9SRichard Henderson#include <asm/unistd.h> 10e34136d9SRichard Henderson#include <asm/errno.h> 11e34136d9SRichard Henderson 12e34136d9SRichard Henderson#ifndef _ARCH_PPC64 13e34136d9SRichard Henderson# define TARGET_ABI32 14e34136d9SRichard Henderson#endif 15e34136d9SRichard Henderson#include "vdso-asmoffset.h" 16e34136d9SRichard Henderson 17e34136d9SRichard Henderson 18e34136d9SRichard Henderson .text 19e34136d9SRichard Henderson 20e34136d9SRichard Henderson.macro endf name 21e34136d9SRichard Henderson .globl \name 22e34136d9SRichard Henderson .size \name, .-\name 23e34136d9SRichard Henderson /* For PPC64, functions have special linkage; we export pointers. */ 24e34136d9SRichard Henderson#ifndef _ARCH_PPC64 25e34136d9SRichard Henderson .type \name, @function 26e34136d9SRichard Henderson#endif 27e34136d9SRichard Henderson.endm 28e34136d9SRichard Henderson 29e34136d9SRichard Henderson.macro raw_syscall nr 30e34136d9SRichard Henderson addi 0, 0, \nr 31e34136d9SRichard Henderson sc 32e34136d9SRichard Henderson.endm 33e34136d9SRichard Henderson 34e34136d9SRichard Henderson.macro vdso_syscall name, nr 35e34136d9SRichard Henderson\name: 36e34136d9SRichard Henderson raw_syscall \nr 37e34136d9SRichard Henderson blr 38e34136d9SRichard Hendersonendf \name 39e34136d9SRichard Henderson.endm 40e34136d9SRichard Henderson 41e34136d9SRichard Henderson .cfi_startproc 42e34136d9SRichard Henderson 43e34136d9SRichard Hendersonvdso_syscall __kernel_gettimeofday, __NR_gettimeofday 44e34136d9SRichard Hendersonvdso_syscall __kernel_clock_gettime, __NR_clock_gettime 45e34136d9SRichard Hendersonvdso_syscall __kernel_clock_getres, __NR_clock_getres 46e34136d9SRichard Hendersonvdso_syscall __kernel_getcpu, __NR_getcpu 47e34136d9SRichard Hendersonvdso_syscall __kernel_time, __NR_time 48e34136d9SRichard Henderson 49e34136d9SRichard Henderson#ifdef __NR_clock_gettime64 50e34136d9SRichard Hendersonvdso_syscall __kernel_clock_gettime64, __NR_clock_gettime64 51e34136d9SRichard Henderson#endif 52e34136d9SRichard Henderson 53e34136d9SRichard Henderson__kernel_sync_dicache: 54e34136d9SRichard Henderson /* qemu does not need to flush caches */ 55e34136d9SRichard Henderson blr 56e34136d9SRichard Hendersonendf __kernel_sync_dicache 57e34136d9SRichard Henderson 58e34136d9SRichard Henderson .cfi_endproc 59e34136d9SRichard Henderson 60e34136d9SRichard Henderson/* 61e34136d9SRichard Henderson * TODO: __kernel_get_tbfreq 62e34136d9SRichard Henderson * This is probably a constant for QEMU. 63e34136d9SRichard Henderson */ 64e34136d9SRichard Henderson 65e34136d9SRichard Henderson/* 66e34136d9SRichard Henderson * Start the unwind info at least one instruction before the signal 67e34136d9SRichard Henderson * trampoline, because the unwinder will assume we are returning 68e34136d9SRichard Henderson * after a call site. 69e34136d9SRichard Henderson */ 70e34136d9SRichard Henderson 71e34136d9SRichard Henderson .cfi_startproc simple 72e34136d9SRichard Henderson .cfi_signal_frame 73e34136d9SRichard Henderson 74e34136d9SRichard Henderson#ifdef _ARCH_PPC64 75e34136d9SRichard Henderson# define __kernel_sigtramp_rt __kernel_sigtramp_rt64 76e34136d9SRichard Henderson# define sizeof_reg 8 77e34136d9SRichard Henderson#else 78e34136d9SRichard Henderson# define __kernel_sigtramp_rt __kernel_sigtramp_rt32 79e34136d9SRichard Henderson# define sizeof_reg 4 80e34136d9SRichard Henderson#endif 81e34136d9SRichard Henderson#define sizeof_freg 8 82e34136d9SRichard Henderson#define sizeof_vreg 16 83e34136d9SRichard Henderson 84e34136d9SRichard Henderson .cfi_def_cfa 1, SIGNAL_FRAMESIZE + offsetof_rt_sigframe_mcontext 85e34136d9SRichard Henderson 86e34136d9SRichard Henderson /* Return address */ 87e34136d9SRichard Henderson .cfi_return_column 67 88e34136d9SRichard Henderson .cfi_offset 67, 32 * sizeof_reg /* nip */ 89e34136d9SRichard Henderson 90e34136d9SRichard Henderson /* Integer registers */ 91e34136d9SRichard Henderson .cfi_offset 0, 0 * sizeof_reg 92e34136d9SRichard Henderson .cfi_offset 1, 1 * sizeof_reg 93e34136d9SRichard Henderson .cfi_offset 2, 2 * sizeof_reg 94e34136d9SRichard Henderson .cfi_offset 3, 3 * sizeof_reg 95e34136d9SRichard Henderson .cfi_offset 4, 4 * sizeof_reg 96e34136d9SRichard Henderson .cfi_offset 5, 5 * sizeof_reg 97e34136d9SRichard Henderson .cfi_offset 6, 6 * sizeof_reg 98e34136d9SRichard Henderson .cfi_offset 7, 7 * sizeof_reg 99e34136d9SRichard Henderson .cfi_offset 8, 8 * sizeof_reg 100e34136d9SRichard Henderson .cfi_offset 9, 9 * sizeof_reg 101e34136d9SRichard Henderson .cfi_offset 10, 10 * sizeof_reg 102e34136d9SRichard Henderson .cfi_offset 11, 11 * sizeof_reg 103e34136d9SRichard Henderson .cfi_offset 12, 12 * sizeof_reg 104e34136d9SRichard Henderson .cfi_offset 13, 13 * sizeof_reg 105e34136d9SRichard Henderson .cfi_offset 14, 14 * sizeof_reg 106e34136d9SRichard Henderson .cfi_offset 15, 15 * sizeof_reg 107e34136d9SRichard Henderson .cfi_offset 16, 16 * sizeof_reg 108e34136d9SRichard Henderson .cfi_offset 17, 17 * sizeof_reg 109e34136d9SRichard Henderson .cfi_offset 18, 18 * sizeof_reg 110e34136d9SRichard Henderson .cfi_offset 19, 19 * sizeof_reg 111e34136d9SRichard Henderson .cfi_offset 20, 20 * sizeof_reg 112e34136d9SRichard Henderson .cfi_offset 21, 21 * sizeof_reg 113e34136d9SRichard Henderson .cfi_offset 22, 22 * sizeof_reg 114e34136d9SRichard Henderson .cfi_offset 23, 23 * sizeof_reg 115e34136d9SRichard Henderson .cfi_offset 24, 24 * sizeof_reg 116e34136d9SRichard Henderson .cfi_offset 25, 25 * sizeof_reg 117e34136d9SRichard Henderson .cfi_offset 26, 26 * sizeof_reg 118e34136d9SRichard Henderson .cfi_offset 27, 27 * sizeof_reg 119e34136d9SRichard Henderson .cfi_offset 28, 28 * sizeof_reg 120e34136d9SRichard Henderson .cfi_offset 29, 29 * sizeof_reg 121e34136d9SRichard Henderson .cfi_offset 30, 30 * sizeof_reg 122e34136d9SRichard Henderson .cfi_offset 31, 31 * sizeof_reg 123e34136d9SRichard Henderson .cfi_offset 65, 36 * sizeof_reg /* lr */ 124e34136d9SRichard Henderson .cfi_offset 70, 38 * sizeof_reg /* ccr */ 125e34136d9SRichard Henderson 126e34136d9SRichard Henderson /* Floating point registers */ 127e34136d9SRichard Henderson .cfi_offset 32, offsetof_mcontext_fregs 128e34136d9SRichard Henderson .cfi_offset 33, offsetof_mcontext_fregs + 1 * sizeof_freg 129e34136d9SRichard Henderson .cfi_offset 34, offsetof_mcontext_fregs + 2 * sizeof_freg 130e34136d9SRichard Henderson .cfi_offset 35, offsetof_mcontext_fregs + 3 * sizeof_freg 131e34136d9SRichard Henderson .cfi_offset 36, offsetof_mcontext_fregs + 4 * sizeof_freg 132e34136d9SRichard Henderson .cfi_offset 37, offsetof_mcontext_fregs + 5 * sizeof_freg 133e34136d9SRichard Henderson .cfi_offset 38, offsetof_mcontext_fregs + 6 * sizeof_freg 134e34136d9SRichard Henderson .cfi_offset 39, offsetof_mcontext_fregs + 7 * sizeof_freg 135e34136d9SRichard Henderson .cfi_offset 40, offsetof_mcontext_fregs + 8 * sizeof_freg 136e34136d9SRichard Henderson .cfi_offset 41, offsetof_mcontext_fregs + 9 * sizeof_freg 137e34136d9SRichard Henderson .cfi_offset 42, offsetof_mcontext_fregs + 10 * sizeof_freg 138e34136d9SRichard Henderson .cfi_offset 43, offsetof_mcontext_fregs + 11 * sizeof_freg 139e34136d9SRichard Henderson .cfi_offset 44, offsetof_mcontext_fregs + 12 * sizeof_freg 140e34136d9SRichard Henderson .cfi_offset 45, offsetof_mcontext_fregs + 13 * sizeof_freg 141e34136d9SRichard Henderson .cfi_offset 46, offsetof_mcontext_fregs + 14 * sizeof_freg 142e34136d9SRichard Henderson .cfi_offset 47, offsetof_mcontext_fregs + 15 * sizeof_freg 143e34136d9SRichard Henderson .cfi_offset 48, offsetof_mcontext_fregs + 16 * sizeof_freg 144e34136d9SRichard Henderson .cfi_offset 49, offsetof_mcontext_fregs + 17 * sizeof_freg 145e34136d9SRichard Henderson .cfi_offset 50, offsetof_mcontext_fregs + 18 * sizeof_freg 146e34136d9SRichard Henderson .cfi_offset 51, offsetof_mcontext_fregs + 19 * sizeof_freg 147e34136d9SRichard Henderson .cfi_offset 52, offsetof_mcontext_fregs + 20 * sizeof_freg 148e34136d9SRichard Henderson .cfi_offset 53, offsetof_mcontext_fregs + 21 * sizeof_freg 149e34136d9SRichard Henderson .cfi_offset 54, offsetof_mcontext_fregs + 22 * sizeof_freg 150e34136d9SRichard Henderson .cfi_offset 55, offsetof_mcontext_fregs + 23 * sizeof_freg 151e34136d9SRichard Henderson .cfi_offset 56, offsetof_mcontext_fregs + 24 * sizeof_freg 152e34136d9SRichard Henderson .cfi_offset 57, offsetof_mcontext_fregs + 25 * sizeof_freg 153e34136d9SRichard Henderson .cfi_offset 58, offsetof_mcontext_fregs + 26 * sizeof_freg 154e34136d9SRichard Henderson .cfi_offset 59, offsetof_mcontext_fregs + 27 * sizeof_freg 155e34136d9SRichard Henderson .cfi_offset 60, offsetof_mcontext_fregs + 28 * sizeof_freg 156e34136d9SRichard Henderson .cfi_offset 61, offsetof_mcontext_fregs + 29 * sizeof_freg 157e34136d9SRichard Henderson .cfi_offset 62, offsetof_mcontext_fregs + 30 * sizeof_freg 158e34136d9SRichard Henderson .cfi_offset 63, offsetof_mcontext_fregs + 31 * sizeof_freg 159e34136d9SRichard Henderson 160e34136d9SRichard Henderson /* 161e34136d9SRichard Henderson * Unlike the kernel, unconditionally represent the Altivec/VSX regs. 162e34136d9SRichard Henderson * The space within the stack frame is always available, and most of 163e34136d9SRichard Henderson * our supported processors have them enabled. The only complication 164e34136d9SRichard Henderson * for PPC64 is the misalignment, so that we have to use indirection. 165e34136d9SRichard Henderson */ 166e34136d9SRichard Henderson.macro save_vreg_ofs reg, ofs 167e34136d9SRichard Henderson#ifdef _ARCH_PPC64 168e34136d9SRichard Henderson /* 169e34136d9SRichard Henderson * vreg = *(cfa + offsetof(v_regs)) + ofs 170e34136d9SRichard Henderson * 171e34136d9SRichard Henderson * The CFA is input to the expression on the stack, so: 172e34136d9SRichard Henderson * DW_CFA_expression reg, length (7), 173e34136d9SRichard Henderson * DW_OP_plus_uconst (0x23), vreg_ptr, DW_OP_deref (0x06), 174e34136d9SRichard Henderson * DW_OP_plus_uconst (0x23), ofs 175e34136d9SRichard Henderson */ 176e34136d9SRichard Henderson .cfi_escape 0x10, 77 + \reg, 7, 0x23, (offsetof_mcontext_vregs_ptr & 0x7f) + 0x80, offsetof_mcontext_vregs_ptr >> 7, 0x06, 0x23, (\ofs & 0x7f) | 0x80, \ofs >> 7 177e34136d9SRichard Henderson#else 178e34136d9SRichard Henderson .cfi_offset 77 + \reg, offsetof_mcontext_vregs + \ofs 179e34136d9SRichard Henderson#endif 180e34136d9SRichard Henderson.endm 181e34136d9SRichard Henderson 182e34136d9SRichard Henderson.macro save_vreg reg 183e34136d9SRichard Henderson save_vreg_ofs \reg, (\reg * sizeof_vreg) 184e34136d9SRichard Henderson.endm 185e34136d9SRichard Henderson 186e34136d9SRichard Henderson save_vreg 0 187e34136d9SRichard Henderson save_vreg 1 188e34136d9SRichard Henderson save_vreg 2 189e34136d9SRichard Henderson save_vreg 3 190e34136d9SRichard Henderson save_vreg 4 191e34136d9SRichard Henderson save_vreg 5 192e34136d9SRichard Henderson save_vreg 6 193e34136d9SRichard Henderson save_vreg 7 194e34136d9SRichard Henderson save_vreg 8 195e34136d9SRichard Henderson save_vreg 9 196e34136d9SRichard Henderson save_vreg 10 197e34136d9SRichard Henderson save_vreg 11 198e34136d9SRichard Henderson save_vreg 12 199e34136d9SRichard Henderson save_vreg 13 200e34136d9SRichard Henderson save_vreg 14 201e34136d9SRichard Henderson save_vreg 15 202e34136d9SRichard Henderson save_vreg 16 203e34136d9SRichard Henderson save_vreg 17 204e34136d9SRichard Henderson save_vreg 18 205e34136d9SRichard Henderson save_vreg 19 206e34136d9SRichard Henderson save_vreg 20 207e34136d9SRichard Henderson save_vreg 21 208e34136d9SRichard Henderson save_vreg 22 209e34136d9SRichard Henderson save_vreg 23 210e34136d9SRichard Henderson save_vreg 24 211e34136d9SRichard Henderson save_vreg 25 212e34136d9SRichard Henderson save_vreg 26 213e34136d9SRichard Henderson save_vreg 27 214e34136d9SRichard Henderson save_vreg 28 215e34136d9SRichard Henderson save_vreg 29 216e34136d9SRichard Henderson save_vreg 30 217e34136d9SRichard Henderson save_vreg 31 218e34136d9SRichard Henderson save_vreg 32 219e34136d9SRichard Henderson save_vreg_ofs 33, (32 * sizeof_vreg + 12) 220e34136d9SRichard Henderson 221e34136d9SRichard Henderson nop 222e34136d9SRichard Henderson 223e34136d9SRichard Henderson__kernel_sigtramp_rt: 224e34136d9SRichard Henderson raw_syscall __NR_rt_sigreturn 225e34136d9SRichard Hendersonendf __kernel_sigtramp_rt 226e34136d9SRichard Henderson 227e34136d9SRichard Henderson#ifndef _ARCH_PPC64 228e34136d9SRichard Henderson /* 229e34136d9SRichard Henderson * The non-rt sigreturn has the same layout at a different offset. 230*2cf91b9aSMichael Tokarev * Move the CFA and leave all the other descriptions the same. 231e34136d9SRichard Henderson */ 232e34136d9SRichard Henderson .cfi_def_cfa 1, SIGNAL_FRAMESIZE + offsetof_sigframe_mcontext 233e34136d9SRichard Henderson nop 234e34136d9SRichard Henderson__kernel_sigtramp32: 235e34136d9SRichard Henderson raw_syscall __NR_sigreturn 236e34136d9SRichard Hendersonendf __kernel_sigtramp32 237e34136d9SRichard Henderson#endif 238e34136d9SRichard Henderson 239e34136d9SRichard Henderson .cfi_endproc 240