xref: /openbmc/qemu/linux-user/include/host/ppc64/host-signal.h (revision ecf1bbe3227cc1c54d7374aa737e7e0e60ee0c29)
1*9d1401b7SKhem Raj /*
2*9d1401b7SKhem Raj  * host-signal.h: signal info dependent on the host architecture
3*9d1401b7SKhem Raj  *
4*9d1401b7SKhem Raj  * Copyright (c) 2003-2005 Fabrice Bellard
5*9d1401b7SKhem Raj  * Copyright (c) 2021 Linaro Limited
6*9d1401b7SKhem Raj  *
7*9d1401b7SKhem Raj  * This work is licensed under the terms of the GNU LGPL, version 2.1 or later.
8*9d1401b7SKhem Raj  * See the COPYING file in the top-level directory.
9*9d1401b7SKhem Raj  */
10*9d1401b7SKhem Raj 
11*9d1401b7SKhem Raj #ifndef PPC_HOST_SIGNAL_H
12*9d1401b7SKhem Raj #define PPC_HOST_SIGNAL_H
13*9d1401b7SKhem Raj 
14*9d1401b7SKhem Raj /* Needed for PT_* constants */
15*9d1401b7SKhem Raj #include <asm/ptrace.h>
16*9d1401b7SKhem Raj 
17*9d1401b7SKhem Raj /* The third argument to a SA_SIGINFO handler is ucontext_t. */
18*9d1401b7SKhem Raj typedef ucontext_t host_sigcontext;
19*9d1401b7SKhem Raj 
host_signal_pc(host_sigcontext * uc)20*9d1401b7SKhem Raj static inline uintptr_t host_signal_pc(host_sigcontext *uc)
21*9d1401b7SKhem Raj {
22*9d1401b7SKhem Raj     return uc->uc_mcontext.gp_regs[PT_NIP];
23*9d1401b7SKhem Raj }
24*9d1401b7SKhem Raj 
host_signal_set_pc(host_sigcontext * uc,uintptr_t pc)25*9d1401b7SKhem Raj static inline void host_signal_set_pc(host_sigcontext *uc, uintptr_t pc)
26*9d1401b7SKhem Raj {
27*9d1401b7SKhem Raj     uc->uc_mcontext.gp_regs[PT_NIP] = pc;
28*9d1401b7SKhem Raj }
29*9d1401b7SKhem Raj 
host_signal_mask(host_sigcontext * uc)30*9d1401b7SKhem Raj static inline void *host_signal_mask(host_sigcontext *uc)
31*9d1401b7SKhem Raj {
32*9d1401b7SKhem Raj     return &uc->uc_sigmask;
33*9d1401b7SKhem Raj }
34*9d1401b7SKhem Raj 
host_signal_write(siginfo_t * info,host_sigcontext * uc)35*9d1401b7SKhem Raj static inline bool host_signal_write(siginfo_t *info, host_sigcontext *uc)
36*9d1401b7SKhem Raj {
37*9d1401b7SKhem Raj     return uc->uc_mcontext.gp_regs[PT_TRAP] != 0x400
38*9d1401b7SKhem Raj         && (uc->uc_mcontext.gp_regs[PT_DSISR] & 0x02000000);
39*9d1401b7SKhem Raj }
40*9d1401b7SKhem Raj 
41*9d1401b7SKhem Raj #endif
42