1*447ca1cbSRichard Henderson /* SPDX-License-Identifier: GPL-2.0-or-later */ 2d3582cfdSPhilippe Mathieu-Daudé /* 3*447ca1cbSRichard Henderson * Target dependent generic vector operation expansion 4d3582cfdSPhilippe Mathieu-Daudé * 5d3582cfdSPhilippe Mathieu-Daudé * Copyright (c) 2018 Linaro 6d3582cfdSPhilippe Mathieu-Daudé */ 7d3582cfdSPhilippe Mathieu-Daudé 8d3582cfdSPhilippe Mathieu-Daudé #ifndef TCG_TCG_OP_GVEC_H 9d3582cfdSPhilippe Mathieu-Daudé #define TCG_TCG_OP_GVEC_H 10d3582cfdSPhilippe Mathieu-Daudé 11*447ca1cbSRichard Henderson #include "tcg/tcg-op-gvec-common.h" 12d3582cfdSPhilippe Mathieu-Daudé 13*447ca1cbSRichard Henderson #ifndef TARGET_LONG_BITS 14*447ca1cbSRichard Henderson #error must include QEMU headers 15*447ca1cbSRichard Henderson #endif 16d3582cfdSPhilippe Mathieu-Daudé 170f039e3aSRichard Henderson #if TARGET_LONG_BITS == 64 180f039e3aSRichard Henderson #define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i64 19448e7aa2SLIU Zhiwei #define tcg_gen_vec_add8_tl tcg_gen_vec_add8_i64 20448e7aa2SLIU Zhiwei #define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i64 213d066e5dSLIU Zhiwei #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64 223d066e5dSLIU Zhiwei #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64 237f05d32fSLIU Zhiwei #define tcg_gen_vec_add32_tl tcg_gen_vec_add32_i64 247f05d32fSLIU Zhiwei #define tcg_gen_vec_sub32_tl tcg_gen_vec_sub32_i64 25950ee590SLIU Zhiwei #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i64 26950ee590SLIU Zhiwei #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i64 27950ee590SLIU Zhiwei #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i64 2804f2a8bbSLIU Zhiwei #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i64 2904f2a8bbSLIU Zhiwei #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i64 3004f2a8bbSLIU Zhiwei #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i64 31*447ca1cbSRichard Henderson #elif TARGET_LONG_BITS == 32 32*447ca1cbSRichard Henderson #define tcg_gen_gvec_dup_tl tcg_gen_gvec_dup_i32 33448e7aa2SLIU Zhiwei #define tcg_gen_vec_add8_tl tcg_gen_vec_add8_i32 34448e7aa2SLIU Zhiwei #define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i32 353d066e5dSLIU Zhiwei #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32 363d066e5dSLIU Zhiwei #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32 377f05d32fSLIU Zhiwei #define tcg_gen_vec_add32_tl tcg_gen_add_i32 387f05d32fSLIU Zhiwei #define tcg_gen_vec_sub32_tl tcg_gen_sub_i32 39950ee590SLIU Zhiwei #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i32 40950ee590SLIU Zhiwei #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i32 41950ee590SLIU Zhiwei #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i32 4204f2a8bbSLIU Zhiwei #define tcg_gen_vec_shl16i_tl tcg_gen_vec_shl16i_i32 4304f2a8bbSLIU Zhiwei #define tcg_gen_vec_shr16i_tl tcg_gen_vec_shr16i_i32 4404f2a8bbSLIU Zhiwei #define tcg_gen_vec_sar16i_tl tcg_gen_vec_sar16i_i32 45*447ca1cbSRichard Henderson #else 46*447ca1cbSRichard Henderson # error 473d066e5dSLIU Zhiwei #endif 483d066e5dSLIU Zhiwei 49d3582cfdSPhilippe Mathieu-Daudé #endif 50