19a1d111eSGerd Hoffmann #ifndef HW_USB_UHCI_REGS_H 2175de524SMarkus Armbruster #define HW_USB_UHCI_REGS_H 39a1d111eSGerd Hoffmann 4*1acf0e50SGuenter Roeck #define UHCI_USBCMD 0 5*1acf0e50SGuenter Roeck #define UHCI_USBSTS 2 6*1acf0e50SGuenter Roeck #define UHCI_USBINTR 4 7*1acf0e50SGuenter Roeck #define UHCI_USBFRNUM 6 8*1acf0e50SGuenter Roeck #define UHCI_USBFLBASEADD 8 9*1acf0e50SGuenter Roeck #define UHCI_USBSOF 0x0c 10*1acf0e50SGuenter Roeck #define UHCI_USBPORTSC1 0x10 11*1acf0e50SGuenter Roeck #define UHCI_USBPORTSC2 0x12 12*1acf0e50SGuenter Roeck #define UHCI_USBPORTSC3 0x14 13*1acf0e50SGuenter Roeck #define UHCI_USBPORTSC4 0x16 14*1acf0e50SGuenter Roeck 159a1d111eSGerd Hoffmann #define UHCI_CMD_FGR (1 << 4) 169a1d111eSGerd Hoffmann #define UHCI_CMD_EGSM (1 << 3) 179a1d111eSGerd Hoffmann #define UHCI_CMD_GRESET (1 << 2) 189a1d111eSGerd Hoffmann #define UHCI_CMD_HCRESET (1 << 1) 199a1d111eSGerd Hoffmann #define UHCI_CMD_RS (1 << 0) 209a1d111eSGerd Hoffmann 219a1d111eSGerd Hoffmann #define UHCI_STS_HCHALTED (1 << 5) 229a1d111eSGerd Hoffmann #define UHCI_STS_HCPERR (1 << 4) 239a1d111eSGerd Hoffmann #define UHCI_STS_HSERR (1 << 3) 249a1d111eSGerd Hoffmann #define UHCI_STS_RD (1 << 2) 259a1d111eSGerd Hoffmann #define UHCI_STS_USBERR (1 << 1) 269a1d111eSGerd Hoffmann #define UHCI_STS_USBINT (1 << 0) 279a1d111eSGerd Hoffmann 289a1d111eSGerd Hoffmann #define TD_CTRL_SPD (1 << 29) 299a1d111eSGerd Hoffmann #define TD_CTRL_ERROR_SHIFT 27 309a1d111eSGerd Hoffmann #define TD_CTRL_IOS (1 << 25) 319a1d111eSGerd Hoffmann #define TD_CTRL_IOC (1 << 24) 329a1d111eSGerd Hoffmann #define TD_CTRL_ACTIVE (1 << 23) 339a1d111eSGerd Hoffmann #define TD_CTRL_STALL (1 << 22) 349a1d111eSGerd Hoffmann #define TD_CTRL_BABBLE (1 << 20) 359a1d111eSGerd Hoffmann #define TD_CTRL_NAK (1 << 19) 369a1d111eSGerd Hoffmann #define TD_CTRL_TIMEOUT (1 << 18) 379a1d111eSGerd Hoffmann 389a1d111eSGerd Hoffmann #define UHCI_PORT_SUSPEND (1 << 12) 399a1d111eSGerd Hoffmann #define UHCI_PORT_RESET (1 << 9) 409a1d111eSGerd Hoffmann #define UHCI_PORT_LSDA (1 << 8) 4195dd1c4dSGerd Hoffmann #define UHCI_PORT_RSVD1 (1 << 7) 429a1d111eSGerd Hoffmann #define UHCI_PORT_RD (1 << 6) 439a1d111eSGerd Hoffmann #define UHCI_PORT_ENC (1 << 3) 449a1d111eSGerd Hoffmann #define UHCI_PORT_EN (1 << 2) 459a1d111eSGerd Hoffmann #define UHCI_PORT_CSC (1 << 1) 469a1d111eSGerd Hoffmann #define UHCI_PORT_CCS (1 << 0) 479a1d111eSGerd Hoffmann 489a1d111eSGerd Hoffmann #define UHCI_PORT_READ_ONLY (0x1bb) 499a1d111eSGerd Hoffmann #define UHCI_PORT_WRITE_CLEAR (UHCI_PORT_CSC | UHCI_PORT_ENC) 509a1d111eSGerd Hoffmann 519a1d111eSGerd Hoffmann #endif /* HW_USB_UHCI_REGS_H */ 52