xref: /openbmc/qemu/include/hw/timer/mss-timer.h (revision 4dad0a9aa818698e0735c8352bf7925a1660df6f)
196401badSSubbaraya Sundeep /*
296401badSSubbaraya Sundeep  * Microsemi SmartFusion2 Timer.
396401badSSubbaraya Sundeep  *
496401badSSubbaraya Sundeep  * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
596401badSSubbaraya Sundeep  *
696401badSSubbaraya Sundeep  * Permission is hereby granted, free of charge, to any person obtaining a copy
796401badSSubbaraya Sundeep  * of this software and associated documentation files (the "Software"), to deal
896401badSSubbaraya Sundeep  * in the Software without restriction, including without limitation the rights
996401badSSubbaraya Sundeep  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
1096401badSSubbaraya Sundeep  * copies of the Software, and to permit persons to whom the Software is
1196401badSSubbaraya Sundeep  * furnished to do so, subject to the following conditions:
1296401badSSubbaraya Sundeep  *
1396401badSSubbaraya Sundeep  * The above copyright notice and this permission notice shall be included in
1496401badSSubbaraya Sundeep  * all copies or substantial portions of the Software.
1596401badSSubbaraya Sundeep  *
1696401badSSubbaraya Sundeep  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1796401badSSubbaraya Sundeep  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1896401badSSubbaraya Sundeep  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
1996401badSSubbaraya Sundeep  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2096401badSSubbaraya Sundeep  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
2196401badSSubbaraya Sundeep  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
2296401badSSubbaraya Sundeep  * THE SOFTWARE.
2396401badSSubbaraya Sundeep  */
2496401badSSubbaraya Sundeep 
2596401badSSubbaraya Sundeep #ifndef HW_MSS_TIMER_H
2696401badSSubbaraya Sundeep #define HW_MSS_TIMER_H
2796401badSSubbaraya Sundeep 
2896401badSSubbaraya Sundeep #include "hw/sysbus.h"
2996401badSSubbaraya Sundeep #include "hw/ptimer.h"
30db1015e9SEduardo Habkost #include "qom/object.h"
3196401badSSubbaraya Sundeep 
3296401badSSubbaraya Sundeep #define TYPE_MSS_TIMER     "mss-timer"
33*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(MSSTimerState, MSS_TIMER)
3496401badSSubbaraya Sundeep 
3596401badSSubbaraya Sundeep /*
3696401badSSubbaraya Sundeep  * There are two 32-bit down counting timers.
3796401badSSubbaraya Sundeep  * Timers 1 and 2 can be concatenated into a single 64-bit Timer
3896401badSSubbaraya Sundeep  * that operates either in Periodic mode or in One-shot mode.
3996401badSSubbaraya Sundeep  * Writing 1 to the TIM64_MODE register bit 0 sets the Timers in 64-bit mode.
4096401badSSubbaraya Sundeep  * In 64-bit mode, writing to the 32-bit registers has no effect.
4196401badSSubbaraya Sundeep  * Similarly, in 32-bit mode, writing to the 64-bit mode registers
4296401badSSubbaraya Sundeep  * has no effect. Only two 32-bit timers are supported currently.
4396401badSSubbaraya Sundeep  */
4496401badSSubbaraya Sundeep #define NUM_TIMERS        2
4596401badSSubbaraya Sundeep 
4696401badSSubbaraya Sundeep #define R_TIM1_MAX        6
4796401badSSubbaraya Sundeep 
4896401badSSubbaraya Sundeep struct Msf2Timer {
4996401badSSubbaraya Sundeep     ptimer_state *ptimer;
5096401badSSubbaraya Sundeep 
5196401badSSubbaraya Sundeep     uint32_t regs[R_TIM1_MAX];
5296401badSSubbaraya Sundeep     qemu_irq irq;
5396401badSSubbaraya Sundeep };
5496401badSSubbaraya Sundeep 
55db1015e9SEduardo Habkost struct MSSTimerState {
5696401badSSubbaraya Sundeep     SysBusDevice parent_obj;
5796401badSSubbaraya Sundeep 
5896401badSSubbaraya Sundeep     MemoryRegion mmio;
5996401badSSubbaraya Sundeep     uint32_t freq_hz;
6096401badSSubbaraya Sundeep     struct Msf2Timer timers[NUM_TIMERS];
61db1015e9SEduardo Habkost };
6296401badSSubbaraya Sundeep 
6396401badSSubbaraya Sundeep #endif /* HW_MSS_TIMER_H */
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