1c21c3b53SPeter Crosthwaite /* 2c21c3b53SPeter Crosthwaite * Global peripheral timer block for ARM A9MP 3c21c3b53SPeter Crosthwaite * 4c21c3b53SPeter Crosthwaite * (C) 2013 Xilinx Inc. 5c21c3b53SPeter Crosthwaite * 6c21c3b53SPeter Crosthwaite * Written by François LEGAL 7c21c3b53SPeter Crosthwaite * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com> 8c21c3b53SPeter Crosthwaite * 9c21c3b53SPeter Crosthwaite * This program is free software; you can redistribute it and/or 10c21c3b53SPeter Crosthwaite * modify it under the terms of the GNU General Public License 11c21c3b53SPeter Crosthwaite * as published by the Free Software Foundation; either version 12c21c3b53SPeter Crosthwaite * 2 of the License, or (at your option) any later version. 13c21c3b53SPeter Crosthwaite * 14c21c3b53SPeter Crosthwaite * This program is distributed in the hope that it will be useful, 15c21c3b53SPeter Crosthwaite * but WITHOUT ANY WARRANTY; without even the implied warranty of 16c21c3b53SPeter Crosthwaite * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17c21c3b53SPeter Crosthwaite * GNU General Public License for more details. 18c21c3b53SPeter Crosthwaite * 19c21c3b53SPeter Crosthwaite * You should have received a copy of the GNU General Public License along 20c21c3b53SPeter Crosthwaite * with this program; if not, see <http://www.gnu.org/licenses/>. 21c21c3b53SPeter Crosthwaite */ 22c21c3b53SPeter Crosthwaite 23121d0712SMarkus Armbruster #ifndef A9GTIMER_H 24121d0712SMarkus Armbruster #define A9GTIMER_H 25c21c3b53SPeter Crosthwaite 26c21c3b53SPeter Crosthwaite #include "hw/sysbus.h" 27db1015e9SEduardo Habkost #include "qom/object.h" 28c21c3b53SPeter Crosthwaite 29c21c3b53SPeter Crosthwaite #define A9_GTIMER_MAX_CPUS 4 30c21c3b53SPeter Crosthwaite 31c21c3b53SPeter Crosthwaite #define TYPE_A9_GTIMER "arm.cortex-a9-global-timer" 32*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(A9GTimerState, A9_GTIMER) 33c21c3b53SPeter Crosthwaite 34c21c3b53SPeter Crosthwaite #define R_COUNTER_LO 0x00 35c21c3b53SPeter Crosthwaite #define R_COUNTER_HI 0x04 36c21c3b53SPeter Crosthwaite 37c21c3b53SPeter Crosthwaite #define R_CONTROL 0x08 38c21c3b53SPeter Crosthwaite #define R_CONTROL_TIMER_ENABLE (1 << 0) 39c21c3b53SPeter Crosthwaite #define R_CONTROL_COMP_ENABLE (1 << 1) 40c21c3b53SPeter Crosthwaite #define R_CONTROL_IRQ_ENABLE (1 << 2) 41786f9ce2SJohannes Schlatow #define R_CONTROL_AUTO_INCREMENT (1 << 3) 42c21c3b53SPeter Crosthwaite #define R_CONTROL_PRESCALER_SHIFT 8 43c21c3b53SPeter Crosthwaite #define R_CONTROL_PRESCALER_LEN 8 44c21c3b53SPeter Crosthwaite #define R_CONTROL_PRESCALER_MASK (((1 << R_CONTROL_PRESCALER_LEN) - 1) << \ 45c21c3b53SPeter Crosthwaite R_CONTROL_PRESCALER_SHIFT) 46c21c3b53SPeter Crosthwaite 47c21c3b53SPeter Crosthwaite #define R_CONTROL_BANKED (R_CONTROL_COMP_ENABLE | \ 48c21c3b53SPeter Crosthwaite R_CONTROL_IRQ_ENABLE | \ 49c21c3b53SPeter Crosthwaite R_CONTROL_AUTO_INCREMENT) 50c21c3b53SPeter Crosthwaite #define R_CONTROL_NEEDS_SYNC (R_CONTROL_TIMER_ENABLE | \ 51c21c3b53SPeter Crosthwaite R_CONTROL_PRESCALER_MASK) 52c21c3b53SPeter Crosthwaite 53c21c3b53SPeter Crosthwaite #define R_INTERRUPT_STATUS 0x0C 54c21c3b53SPeter Crosthwaite #define R_COMPARATOR_LO 0x10 55c21c3b53SPeter Crosthwaite #define R_COMPARATOR_HI 0x14 56c21c3b53SPeter Crosthwaite #define R_AUTO_INCREMENT 0x18 57c21c3b53SPeter Crosthwaite 58c21c3b53SPeter Crosthwaite typedef struct A9GTimerPerCPU A9GTimerPerCPU; 59c21c3b53SPeter Crosthwaite 60c21c3b53SPeter Crosthwaite struct A9GTimerPerCPU { 61c21c3b53SPeter Crosthwaite A9GTimerState *parent; 62c21c3b53SPeter Crosthwaite 63c21c3b53SPeter Crosthwaite uint32_t control; /* only per cpu banked bits valid */ 64c21c3b53SPeter Crosthwaite uint64_t compare; 65c21c3b53SPeter Crosthwaite uint32_t status; 66c21c3b53SPeter Crosthwaite uint32_t inc; 67c21c3b53SPeter Crosthwaite 68c21c3b53SPeter Crosthwaite MemoryRegion iomem; 69c21c3b53SPeter Crosthwaite qemu_irq irq; /* PPI interrupts */ 70c21c3b53SPeter Crosthwaite }; 71c21c3b53SPeter Crosthwaite 72c21c3b53SPeter Crosthwaite struct A9GTimerState { 73c21c3b53SPeter Crosthwaite /*< private >*/ 74c21c3b53SPeter Crosthwaite SysBusDevice parent_obj; 75c21c3b53SPeter Crosthwaite /*< public >*/ 76c21c3b53SPeter Crosthwaite 77c21c3b53SPeter Crosthwaite MemoryRegion iomem; 78c21c3b53SPeter Crosthwaite /* static props */ 79c21c3b53SPeter Crosthwaite uint32_t num_cpu; 80c21c3b53SPeter Crosthwaite 81c21c3b53SPeter Crosthwaite QEMUTimer *timer; 82c21c3b53SPeter Crosthwaite 83c21c3b53SPeter Crosthwaite uint64_t counter; /* current timer value */ 84c21c3b53SPeter Crosthwaite 85c21c3b53SPeter Crosthwaite uint64_t ref_counter; 86c21c3b53SPeter Crosthwaite uint64_t cpu_ref_time; /* the cpu time as of last update of ref_counter */ 87c21c3b53SPeter Crosthwaite uint32_t control; /* only non per cpu banked bits valid */ 88c21c3b53SPeter Crosthwaite 89c21c3b53SPeter Crosthwaite A9GTimerPerCPU per_cpu[A9_GTIMER_MAX_CPUS]; 90c21c3b53SPeter Crosthwaite }; 91c21c3b53SPeter Crosthwaite 92c21c3b53SPeter Crosthwaite typedef struct A9GTimerUpdate { 93c21c3b53SPeter Crosthwaite uint64_t now; 94c21c3b53SPeter Crosthwaite uint64_t new; 95c21c3b53SPeter Crosthwaite } A9GTimerUpdate; 96c21c3b53SPeter Crosthwaite 97121d0712SMarkus Armbruster #endif /* A9GTIMER_H */ 98