1d044adc2SPhilippe Mathieu-Daudé /* 2d044adc2SPhilippe Mathieu-Daudé * Definitions for SH board emulation 3d044adc2SPhilippe Mathieu-Daudé * 4d044adc2SPhilippe Mathieu-Daudé * Copyright (c) 2005 Samuel Tardieu 5d044adc2SPhilippe Mathieu-Daudé * 6d044adc2SPhilippe Mathieu-Daudé * Permission is hereby granted, free of charge, to any person obtaining a copy 7d044adc2SPhilippe Mathieu-Daudé * of this software and associated documentation files (the "Software"), to deal 8d044adc2SPhilippe Mathieu-Daudé * in the Software without restriction, including without limitation the rights 9d044adc2SPhilippe Mathieu-Daudé * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10d044adc2SPhilippe Mathieu-Daudé * copies of the Software, and to permit persons to whom the Software is 11d044adc2SPhilippe Mathieu-Daudé * furnished to do so, subject to the following conditions: 12d044adc2SPhilippe Mathieu-Daudé * 13d044adc2SPhilippe Mathieu-Daudé * The above copyright notice and this permission notice (including the next 14d044adc2SPhilippe Mathieu-Daudé * paragraph) shall be included in all copies or substantial portions of the 15d044adc2SPhilippe Mathieu-Daudé * Software. 16d044adc2SPhilippe Mathieu-Daudé * 17d044adc2SPhilippe Mathieu-Daudé * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18d044adc2SPhilippe Mathieu-Daudé * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19d044adc2SPhilippe Mathieu-Daudé * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20d044adc2SPhilippe Mathieu-Daudé * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21d044adc2SPhilippe Mathieu-Daudé * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22d044adc2SPhilippe Mathieu-Daudé * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23d044adc2SPhilippe Mathieu-Daudé * THE SOFTWARE. 24d044adc2SPhilippe Mathieu-Daudé * 25d044adc2SPhilippe Mathieu-Daudé * SPDX-License-Identifier: MIT 26d044adc2SPhilippe Mathieu-Daudé */ 27d044adc2SPhilippe Mathieu-Daudé #ifndef QEMU_HW_SH_H 28d044adc2SPhilippe Mathieu-Daudé #define QEMU_HW_SH_H 290d09e41aSPaolo Bonzini 300d09e41aSPaolo Bonzini #include "hw/sh4/sh_intc.h" 31fcf5ef2aSThomas Huth #include "target/sh4/cpu-qom.h" 320d09e41aSPaolo Bonzini 330d09e41aSPaolo Bonzini #define A7ADDR(x) ((x) & 0x1fffffff) 340d09e41aSPaolo Bonzini #define P4ADDR(x) ((x) | 0xe0000000) 350d09e41aSPaolo Bonzini 360d09e41aSPaolo Bonzini /* sh7750.c */ 370d09e41aSPaolo Bonzini struct SH7750State; 380d09e41aSPaolo Bonzini 39ba2afd0eSPhilippe Mathieu-Daudé struct SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem); 400d09e41aSPaolo Bonzini 410d09e41aSPaolo Bonzini typedef struct { 420d09e41aSPaolo Bonzini /* The callback will be triggered if any of the designated lines change */ 430d09e41aSPaolo Bonzini uint16_t portamask_trigger; 440d09e41aSPaolo Bonzini uint16_t portbmask_trigger; 450d09e41aSPaolo Bonzini /* Return 0 if no action was taken */ 460d09e41aSPaolo Bonzini int (*port_change_cb) (uint16_t porta, uint16_t portb, 470d09e41aSPaolo Bonzini uint16_t *periph_pdtra, 480d09e41aSPaolo Bonzini uint16_t *periph_portdira, 490d09e41aSPaolo Bonzini uint16_t *periph_pdtrb, 500d09e41aSPaolo Bonzini uint16_t *periph_portdirb); 510d09e41aSPaolo Bonzini } sh7750_io_device; 520d09e41aSPaolo Bonzini 530d09e41aSPaolo Bonzini int sh7750_register_io_device(struct SH7750State *s, 540d09e41aSPaolo Bonzini sh7750_io_device *device); 550d09e41aSPaolo Bonzini 560d09e41aSPaolo Bonzini /* sh_serial.c */ 57*beeb5209SBALATON Zoltan #define TYPE_SH_SERIAL "sh-serial" 580d09e41aSPaolo Bonzini #define SH_SERIAL_FEAT_SCIF (1 << 0) 590d09e41aSPaolo Bonzini 600d09e41aSPaolo Bonzini /* sh7750.c */ 610d09e41aSPaolo Bonzini qemu_irq sh7750_irl(struct SH7750State *s); 620d09e41aSPaolo Bonzini 630d09e41aSPaolo Bonzini /* tc58128.c */ 640d09e41aSPaolo Bonzini int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); 650d09e41aSPaolo Bonzini 660d09e41aSPaolo Bonzini #endif 67