10d09e41aSPaolo Bonzini #ifndef QEMU_SH_H 20d09e41aSPaolo Bonzini #define QEMU_SH_H 30d09e41aSPaolo Bonzini /* Definitions for SH board emulation. */ 40d09e41aSPaolo Bonzini 50d09e41aSPaolo Bonzini #include "hw/sh4/sh_intc.h" 6fcf5ef2aSThomas Huth #include "target/sh4/cpu-qom.h" 70d09e41aSPaolo Bonzini 80d09e41aSPaolo Bonzini #define A7ADDR(x) ((x) & 0x1fffffff) 90d09e41aSPaolo Bonzini #define P4ADDR(x) ((x) | 0xe0000000) 100d09e41aSPaolo Bonzini 110d09e41aSPaolo Bonzini /* sh7750.c */ 120d09e41aSPaolo Bonzini struct SH7750State; 130d09e41aSPaolo Bonzini 14*ba2afd0eSPhilippe Mathieu-Daudé struct SH7750State *sh7750_init(SuperHCPU *cpu, MemoryRegion *sysmem); 150d09e41aSPaolo Bonzini 160d09e41aSPaolo Bonzini typedef struct { 170d09e41aSPaolo Bonzini /* The callback will be triggered if any of the designated lines change */ 180d09e41aSPaolo Bonzini uint16_t portamask_trigger; 190d09e41aSPaolo Bonzini uint16_t portbmask_trigger; 200d09e41aSPaolo Bonzini /* Return 0 if no action was taken */ 210d09e41aSPaolo Bonzini int (*port_change_cb) (uint16_t porta, uint16_t portb, 220d09e41aSPaolo Bonzini uint16_t * periph_pdtra, 230d09e41aSPaolo Bonzini uint16_t * periph_portdira, 240d09e41aSPaolo Bonzini uint16_t * periph_pdtrb, 250d09e41aSPaolo Bonzini uint16_t * periph_portdirb); 260d09e41aSPaolo Bonzini } sh7750_io_device; 270d09e41aSPaolo Bonzini 280d09e41aSPaolo Bonzini int sh7750_register_io_device(struct SH7750State *s, 290d09e41aSPaolo Bonzini sh7750_io_device * device); 300d09e41aSPaolo Bonzini /* sh_timer.c */ 310d09e41aSPaolo Bonzini #define TMU012_FEAT_TOCR (1 << 0) 320d09e41aSPaolo Bonzini #define TMU012_FEAT_3CHAN (1 << 1) 330d09e41aSPaolo Bonzini #define TMU012_FEAT_EXTCLK (1 << 2) 34*ba2afd0eSPhilippe Mathieu-Daudé void tmu012_init(MemoryRegion *sysmem, hwaddr base, 350d09e41aSPaolo Bonzini int feat, uint32_t freq, 360d09e41aSPaolo Bonzini qemu_irq ch0_irq, qemu_irq ch1_irq, 370d09e41aSPaolo Bonzini qemu_irq ch2_irq0, qemu_irq ch2_irq1); 380d09e41aSPaolo Bonzini 390d09e41aSPaolo Bonzini 400d09e41aSPaolo Bonzini /* sh_serial.c */ 410d09e41aSPaolo Bonzini #define SH_SERIAL_FEAT_SCIF (1 << 0) 420d09e41aSPaolo Bonzini void sh_serial_init(MemoryRegion *sysmem, 430d09e41aSPaolo Bonzini hwaddr base, int feat, 440ec7b3e7SMarc-André Lureau uint32_t freq, Chardev *chr, 450d09e41aSPaolo Bonzini qemu_irq eri_source, 460d09e41aSPaolo Bonzini qemu_irq rxi_source, 470d09e41aSPaolo Bonzini qemu_irq txi_source, 480d09e41aSPaolo Bonzini qemu_irq tei_source, 490d09e41aSPaolo Bonzini qemu_irq bri_source); 500d09e41aSPaolo Bonzini 510d09e41aSPaolo Bonzini /* sh7750.c */ 520d09e41aSPaolo Bonzini qemu_irq sh7750_irl(struct SH7750State *s); 530d09e41aSPaolo Bonzini 540d09e41aSPaolo Bonzini /* tc58128.c */ 550d09e41aSPaolo Bonzini int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); 560d09e41aSPaolo Bonzini 570d09e41aSPaolo Bonzini #endif 58