1*0d09e41aSPaolo Bonzini #ifndef QEMU_SH_H 2*0d09e41aSPaolo Bonzini #define QEMU_SH_H 3*0d09e41aSPaolo Bonzini /* Definitions for SH board emulation. */ 4*0d09e41aSPaolo Bonzini 5*0d09e41aSPaolo Bonzini #include "hw/sh4/sh_intc.h" 6*0d09e41aSPaolo Bonzini 7*0d09e41aSPaolo Bonzini #define A7ADDR(x) ((x) & 0x1fffffff) 8*0d09e41aSPaolo Bonzini #define P4ADDR(x) ((x) | 0xe0000000) 9*0d09e41aSPaolo Bonzini 10*0d09e41aSPaolo Bonzini /* sh7750.c */ 11*0d09e41aSPaolo Bonzini struct SH7750State; 12*0d09e41aSPaolo Bonzini struct MemoryRegion; 13*0d09e41aSPaolo Bonzini 14*0d09e41aSPaolo Bonzini struct SH7750State *sh7750_init(CPUSH4State * cpu, struct MemoryRegion *sysmem); 15*0d09e41aSPaolo Bonzini 16*0d09e41aSPaolo Bonzini typedef struct { 17*0d09e41aSPaolo Bonzini /* The callback will be triggered if any of the designated lines change */ 18*0d09e41aSPaolo Bonzini uint16_t portamask_trigger; 19*0d09e41aSPaolo Bonzini uint16_t portbmask_trigger; 20*0d09e41aSPaolo Bonzini /* Return 0 if no action was taken */ 21*0d09e41aSPaolo Bonzini int (*port_change_cb) (uint16_t porta, uint16_t portb, 22*0d09e41aSPaolo Bonzini uint16_t * periph_pdtra, 23*0d09e41aSPaolo Bonzini uint16_t * periph_portdira, 24*0d09e41aSPaolo Bonzini uint16_t * periph_pdtrb, 25*0d09e41aSPaolo Bonzini uint16_t * periph_portdirb); 26*0d09e41aSPaolo Bonzini } sh7750_io_device; 27*0d09e41aSPaolo Bonzini 28*0d09e41aSPaolo Bonzini int sh7750_register_io_device(struct SH7750State *s, 29*0d09e41aSPaolo Bonzini sh7750_io_device * device); 30*0d09e41aSPaolo Bonzini /* sh_timer.c */ 31*0d09e41aSPaolo Bonzini #define TMU012_FEAT_TOCR (1 << 0) 32*0d09e41aSPaolo Bonzini #define TMU012_FEAT_3CHAN (1 << 1) 33*0d09e41aSPaolo Bonzini #define TMU012_FEAT_EXTCLK (1 << 2) 34*0d09e41aSPaolo Bonzini void tmu012_init(struct MemoryRegion *sysmem, hwaddr base, 35*0d09e41aSPaolo Bonzini int feat, uint32_t freq, 36*0d09e41aSPaolo Bonzini qemu_irq ch0_irq, qemu_irq ch1_irq, 37*0d09e41aSPaolo Bonzini qemu_irq ch2_irq0, qemu_irq ch2_irq1); 38*0d09e41aSPaolo Bonzini 39*0d09e41aSPaolo Bonzini 40*0d09e41aSPaolo Bonzini /* sh_serial.c */ 41*0d09e41aSPaolo Bonzini #define SH_SERIAL_FEAT_SCIF (1 << 0) 42*0d09e41aSPaolo Bonzini void sh_serial_init(MemoryRegion *sysmem, 43*0d09e41aSPaolo Bonzini hwaddr base, int feat, 44*0d09e41aSPaolo Bonzini uint32_t freq, CharDriverState *chr, 45*0d09e41aSPaolo Bonzini qemu_irq eri_source, 46*0d09e41aSPaolo Bonzini qemu_irq rxi_source, 47*0d09e41aSPaolo Bonzini qemu_irq txi_source, 48*0d09e41aSPaolo Bonzini qemu_irq tei_source, 49*0d09e41aSPaolo Bonzini qemu_irq bri_source); 50*0d09e41aSPaolo Bonzini 51*0d09e41aSPaolo Bonzini /* sh7750.c */ 52*0d09e41aSPaolo Bonzini qemu_irq sh7750_irl(struct SH7750State *s); 53*0d09e41aSPaolo Bonzini 54*0d09e41aSPaolo Bonzini /* tc58128.c */ 55*0d09e41aSPaolo Bonzini int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); 56*0d09e41aSPaolo Bonzini 57*0d09e41aSPaolo Bonzini #endif 58