1 /* 2 * QEMU PowerPC sPAPR IRQ backend definitions 3 * 4 * Copyright (c) 2018, IBM Corporation. 5 * 6 * This code is licensed under the GPL version 2 or later. See the 7 * COPYING file in the top-level directory. 8 */ 9 10 #ifndef HW_SPAPR_IRQ_H 11 #define HW_SPAPR_IRQ_H 12 13 #include "hw/irq.h" 14 #include "target/ppc/cpu-qom.h" 15 16 /* 17 * IRQ range offsets per device type 18 */ 19 #define SPAPR_IRQ_IPI 0x0 20 #define SPAPR_IRQ_EPOW 0x1000 /* XICS_IRQ_BASE offset */ 21 #define SPAPR_IRQ_HOTPLUG 0x1001 22 #define SPAPR_IRQ_VIO 0x1100 /* 256 VIO devices */ 23 #define SPAPR_IRQ_PCI_LSI 0x1200 /* 32+ PHBs devices */ 24 25 #define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered 26 * by the bitmap allocator */ 27 28 typedef struct SpaprMachineState SpaprMachineState; 29 30 void spapr_irq_msi_init(SpaprMachineState *spapr, uint32_t nr_msis); 31 int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align, 32 Error **errp); 33 void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num); 34 void spapr_irq_msi_reset(SpaprMachineState *spapr); 35 36 typedef struct SpaprIrq { 37 uint32_t nr_irqs; 38 uint32_t nr_msis; 39 uint8_t ov5; 40 41 void (*init)(SpaprMachineState *spapr, int nr_irqs, Error **errp); 42 int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); 43 void (*free)(SpaprMachineState *spapr, int irq, int num); 44 qemu_irq (*qirq)(SpaprMachineState *spapr, int irq); 45 void (*print_info)(SpaprMachineState *spapr, Monitor *mon); 46 void (*dt_populate)(SpaprMachineState *spapr, uint32_t nr_servers, 47 void *fdt, uint32_t phandle); 48 void (*cpu_intc_create)(SpaprMachineState *spapr, PowerPCCPU *cpu, 49 Error **errp); 50 int (*post_load)(SpaprMachineState *spapr, int version_id); 51 void (*reset)(SpaprMachineState *spapr, Error **errp); 52 void (*set_irq)(void *opaque, int srcno, int val); 53 const char *(*get_nodename)(SpaprMachineState *spapr); 54 void (*init_kvm)(SpaprMachineState *spapr, Error **errp); 55 } SpaprIrq; 56 57 extern SpaprIrq spapr_irq_xics; 58 extern SpaprIrq spapr_irq_xics_legacy; 59 extern SpaprIrq spapr_irq_xive; 60 extern SpaprIrq spapr_irq_dual; 61 62 void spapr_irq_init(SpaprMachineState *spapr, Error **errp); 63 int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); 64 void spapr_irq_free(SpaprMachineState *spapr, int irq, int num); 65 qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); 66 int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); 67 void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); 68 int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); 69 70 /* 71 * XICS legacy routines 72 */ 73 int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp); 74 #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp) 75 76 #endif 77