10d09e41aSPaolo Bonzini #ifndef QEMU_MSIX_H 20d09e41aSPaolo Bonzini #define QEMU_MSIX_H 30d09e41aSPaolo Bonzini 40d09e41aSPaolo Bonzini #include "hw/pci/pci.h" 50d09e41aSPaolo Bonzini 62d9574bdSLi Qiang #define MSIX_CAP_LENGTH 12 72d9574bdSLi Qiang 80d09e41aSPaolo Bonzini void msix_set_message(PCIDevice *dev, int vector, MSIMessage msg); 90d09e41aSPaolo Bonzini MSIMessage msix_get_message(PCIDevice *dev, unsigned int vector); 100d09e41aSPaolo Bonzini int msix_init(PCIDevice *dev, unsigned short nentries, 110d09e41aSPaolo Bonzini MemoryRegion *table_bar, uint8_t table_bar_nr, 120d09e41aSPaolo Bonzini unsigned table_offset, MemoryRegion *pba_bar, 13ee640c62SCao jin uint8_t pba_bar_nr, unsigned pba_offset, uint8_t cap_pos, 14ee640c62SCao jin Error **errp); 150d09e41aSPaolo Bonzini int msix_init_exclusive_bar(PCIDevice *dev, unsigned short nentries, 16ee640c62SCao jin uint8_t bar_nr, Error **errp); 170d09e41aSPaolo Bonzini 180d09e41aSPaolo Bonzini void msix_write_config(PCIDevice *dev, uint32_t address, uint32_t val, int len); 190d09e41aSPaolo Bonzini 200d09e41aSPaolo Bonzini void msix_uninit(PCIDevice *dev, MemoryRegion *table_bar, 210d09e41aSPaolo Bonzini MemoryRegion *pba_bar); 220d09e41aSPaolo Bonzini void msix_uninit_exclusive_bar(PCIDevice *dev); 230d09e41aSPaolo Bonzini 240d09e41aSPaolo Bonzini unsigned int msix_nr_vectors_allocated(const PCIDevice *dev); 250d09e41aSPaolo Bonzini 260d09e41aSPaolo Bonzini void msix_save(PCIDevice *dev, QEMUFile *f); 270d09e41aSPaolo Bonzini void msix_load(PCIDevice *dev, QEMUFile *f); 280d09e41aSPaolo Bonzini 290d09e41aSPaolo Bonzini int msix_enabled(PCIDevice *dev); 300d09e41aSPaolo Bonzini int msix_present(PCIDevice *dev); 310d09e41aSPaolo Bonzini 320d09e41aSPaolo Bonzini bool msix_is_masked(PCIDevice *dev, unsigned vector); 330d09e41aSPaolo Bonzini void msix_set_pending(PCIDevice *dev, unsigned vector); 343bdfaabbSDmitry Fleytman void msix_clr_pending(PCIDevice *dev, int vector); 350d09e41aSPaolo Bonzini 36*15377f6eSAkihiko Odaki void msix_vector_use(PCIDevice *dev, unsigned vector); 370d09e41aSPaolo Bonzini void msix_vector_unuse(PCIDevice *dev, unsigned vector); 380d09e41aSPaolo Bonzini void msix_unuse_all_vectors(PCIDevice *dev); 39*15377f6eSAkihiko Odaki void msix_set_mask(PCIDevice *dev, int vector, bool mask); 400d09e41aSPaolo Bonzini 410d09e41aSPaolo Bonzini void msix_notify(PCIDevice *dev, unsigned vector); 420d09e41aSPaolo Bonzini 430d09e41aSPaolo Bonzini void msix_reset(PCIDevice *dev); 440d09e41aSPaolo Bonzini 450d09e41aSPaolo Bonzini int msix_set_vector_notifiers(PCIDevice *dev, 460d09e41aSPaolo Bonzini MSIVectorUseNotifier use_notifier, 470d09e41aSPaolo Bonzini MSIVectorReleaseNotifier release_notifier, 480d09e41aSPaolo Bonzini MSIVectorPollNotifier poll_notifier); 490d09e41aSPaolo Bonzini void msix_unset_vector_notifiers(PCIDevice *dev); 50340b50c7SGerd Hoffmann 51340b50c7SGerd Hoffmann extern const VMStateDescription vmstate_msix; 52340b50c7SGerd Hoffmann 53c246a62fSMarc-André Lureau #define VMSTATE_MSIX_TEST(_field, _state, _test) { \ 54340b50c7SGerd Hoffmann .name = (stringify(_field)), \ 55340b50c7SGerd Hoffmann .size = sizeof(PCIDevice), \ 56340b50c7SGerd Hoffmann .vmsd = &vmstate_msix, \ 57340b50c7SGerd Hoffmann .flags = VMS_STRUCT, \ 58340b50c7SGerd Hoffmann .offset = vmstate_offset_value(_state, _field, PCIDevice), \ 59c246a62fSMarc-André Lureau .field_exists = (_test) \ 60340b50c7SGerd Hoffmann } 61340b50c7SGerd Hoffmann 62c246a62fSMarc-André Lureau #define VMSTATE_MSIX(_f, _s) \ 63c246a62fSMarc-André Lureau VMSTATE_MSIX_TEST(_f, _s, NULL) 64c246a62fSMarc-André Lureau 650d09e41aSPaolo Bonzini #endif 66