10d09e41aSPaolo Bonzini #ifndef QEMU_PAM_H 20d09e41aSPaolo Bonzini #define QEMU_PAM_H 30d09e41aSPaolo Bonzini 40d09e41aSPaolo Bonzini /* 50d09e41aSPaolo Bonzini * Copyright (c) 2006 Fabrice Bellard 60d09e41aSPaolo Bonzini * Copyright (c) 2011 Isaku Yamahata <yamahata at valinux co jp> 70d09e41aSPaolo Bonzini * VA Linux Systems Japan K.K. 80d09e41aSPaolo Bonzini * Copyright (c) 2012 Jason Baron <jbaron@redhat.com> 90d09e41aSPaolo Bonzini * 10ef9f7b58SGonglei * Split out from piix.c 110d09e41aSPaolo Bonzini * 120d09e41aSPaolo Bonzini * Permission is hereby granted, free of charge, to any person obtaining a copy 130d09e41aSPaolo Bonzini * of this software and associated documentation files (the "Software"), to deal 140d09e41aSPaolo Bonzini * in the Software without restriction, including without limitation the rights 150d09e41aSPaolo Bonzini * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 160d09e41aSPaolo Bonzini * copies of the Software, and to permit persons to whom the Software is 170d09e41aSPaolo Bonzini * furnished to do so, subject to the following conditions: 180d09e41aSPaolo Bonzini * 190d09e41aSPaolo Bonzini * The above copyright notice and this permission notice shall be included in 200d09e41aSPaolo Bonzini * all copies or substantial portions of the Software. 210d09e41aSPaolo Bonzini * 220d09e41aSPaolo Bonzini * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 230d09e41aSPaolo Bonzini * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 240d09e41aSPaolo Bonzini * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 250d09e41aSPaolo Bonzini * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 260d09e41aSPaolo Bonzini * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 270d09e41aSPaolo Bonzini * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 280d09e41aSPaolo Bonzini * THE SOFTWARE. 290d09e41aSPaolo Bonzini */ 300d09e41aSPaolo Bonzini 310d09e41aSPaolo Bonzini /* 320d09e41aSPaolo Bonzini * SMRAM memory area and PAM memory area in Legacy address range for PC. 330d09e41aSPaolo Bonzini * PAM: Programmable Attribute Map registers 340d09e41aSPaolo Bonzini * 350d09e41aSPaolo Bonzini * 0xa0000 - 0xbffff compatible SMRAM 360d09e41aSPaolo Bonzini * 370d09e41aSPaolo Bonzini * 0xc0000 - 0xc3fff Expansion area memory segments 380d09e41aSPaolo Bonzini * 0xc4000 - 0xc7fff 390d09e41aSPaolo Bonzini * 0xc8000 - 0xcbfff 400d09e41aSPaolo Bonzini * 0xcc000 - 0xcffff 410d09e41aSPaolo Bonzini * 0xd0000 - 0xd3fff 420d09e41aSPaolo Bonzini * 0xd4000 - 0xd7fff 430d09e41aSPaolo Bonzini * 0xd8000 - 0xdbfff 440d09e41aSPaolo Bonzini * 0xdc000 - 0xdffff 450d09e41aSPaolo Bonzini * 0xe0000 - 0xe3fff Extended System BIOS Area Memory Segments 460d09e41aSPaolo Bonzini * 0xe4000 - 0xe7fff 470d09e41aSPaolo Bonzini * 0xe8000 - 0xebfff 480d09e41aSPaolo Bonzini * 0xec000 - 0xeffff 490d09e41aSPaolo Bonzini * 500d09e41aSPaolo Bonzini * 0xf0000 - 0xfffff System BIOS Area Memory Segments 510d09e41aSPaolo Bonzini */ 520d09e41aSPaolo Bonzini 530d09e41aSPaolo Bonzini #include "exec/memory.h" 540d09e41aSPaolo Bonzini 550d09e41aSPaolo Bonzini #define SMRAM_C_BASE 0xa0000 560d09e41aSPaolo Bonzini #define SMRAM_C_END 0xc0000 570d09e41aSPaolo Bonzini #define SMRAM_C_SIZE 0x20000 580d09e41aSPaolo Bonzini 590d09e41aSPaolo Bonzini #define PAM_EXPAN_BASE 0xc0000 600d09e41aSPaolo Bonzini #define PAM_EXPAN_SIZE 0x04000 610d09e41aSPaolo Bonzini 620d09e41aSPaolo Bonzini #define PAM_EXBIOS_BASE 0xe0000 630d09e41aSPaolo Bonzini #define PAM_EXBIOS_SIZE 0x04000 640d09e41aSPaolo Bonzini 650d09e41aSPaolo Bonzini #define PAM_BIOS_BASE 0xf0000 660d09e41aSPaolo Bonzini #define PAM_BIOS_END 0xfffff 670d09e41aSPaolo Bonzini /* 64KB: Intel 3 series express chipset family p. 58*/ 680d09e41aSPaolo Bonzini #define PAM_BIOS_SIZE 0x10000 690d09e41aSPaolo Bonzini 700d09e41aSPaolo Bonzini /* PAM registers: log nibble and high nibble*/ 710d09e41aSPaolo Bonzini #define PAM_ATTR_WE ((uint8_t)2) 720d09e41aSPaolo Bonzini #define PAM_ATTR_RE ((uint8_t)1) 730d09e41aSPaolo Bonzini #define PAM_ATTR_MASK ((uint8_t)3) 740d09e41aSPaolo Bonzini 750d09e41aSPaolo Bonzini /* SMRAM register */ 760d09e41aSPaolo Bonzini #define SMRAM_D_OPEN ((uint8_t)(1 << 6)) 770d09e41aSPaolo Bonzini #define SMRAM_D_CLS ((uint8_t)(1 << 5)) 780d09e41aSPaolo Bonzini #define SMRAM_D_LCK ((uint8_t)(1 << 4)) 790d09e41aSPaolo Bonzini #define SMRAM_G_SMRAME ((uint8_t)(1 << 3)) 800d09e41aSPaolo Bonzini #define SMRAM_C_BASE_SEG_MASK ((uint8_t)0x7) 810d09e41aSPaolo Bonzini #define SMRAM_C_BASE_SEG ((uint8_t)0x2) /* hardwired to b010 */ 820d09e41aSPaolo Bonzini 83f6a3c86eSPhilippe Mathieu-Daudé #define PAM_REGIONS_COUNT 13 84f6a3c86eSPhilippe Mathieu-Daudé 850d09e41aSPaolo Bonzini typedef struct PAMMemoryRegion { 860d09e41aSPaolo Bonzini MemoryRegion alias[4]; /* index = PAM value */ 870d09e41aSPaolo Bonzini unsigned current; 880d09e41aSPaolo Bonzini } PAMMemoryRegion; 890d09e41aSPaolo Bonzini 90*9e57b818SBernhard Beschow void init_pam(PAMMemoryRegion *mem, Object *owner, MemoryRegion *ram, 91*9e57b818SBernhard Beschow MemoryRegion *system, MemoryRegion *pci, 92*9e57b818SBernhard Beschow uint32_t start, uint32_t size); 930d09e41aSPaolo Bonzini void pam_update(PAMMemoryRegion *mem, int idx, uint8_t val); 940d09e41aSPaolo Bonzini 950d09e41aSPaolo Bonzini #endif /* QEMU_PAM_H */ 96