19fe640a5SBin Meng /* 29fe640a5SBin Meng * QEMU SiFive U PRCI (Power, Reset, Clock, Interrupt) interface 39fe640a5SBin Meng * 49fe640a5SBin Meng * Copyright (c) 2019 Bin Meng <bmeng.cn@gmail.com> 59fe640a5SBin Meng * 69fe640a5SBin Meng * This program is free software; you can redistribute it and/or modify it 79fe640a5SBin Meng * under the terms and conditions of the GNU General Public License, 89fe640a5SBin Meng * version 2 or later, as published by the Free Software Foundation. 99fe640a5SBin Meng * 109fe640a5SBin Meng * This program is distributed in the hope it will be useful, but WITHOUT 119fe640a5SBin Meng * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 129fe640a5SBin Meng * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 139fe640a5SBin Meng * more details. 149fe640a5SBin Meng * 159fe640a5SBin Meng * You should have received a copy of the GNU General Public License along with 169fe640a5SBin Meng * this program. If not, see <http://www.gnu.org/licenses/>. 179fe640a5SBin Meng */ 189fe640a5SBin Meng 199fe640a5SBin Meng #ifndef HW_SIFIVE_U_PRCI_H 209fe640a5SBin Meng #define HW_SIFIVE_U_PRCI_H 21ac900edeSEduardo Habkost #include "qom/object.h" 229fe640a5SBin Meng 239fe640a5SBin Meng #define SIFIVE_U_PRCI_HFXOSCCFG 0x00 249fe640a5SBin Meng #define SIFIVE_U_PRCI_COREPLLCFG0 0x04 259fe640a5SBin Meng #define SIFIVE_U_PRCI_DDRPLLCFG0 0x0C 269fe640a5SBin Meng #define SIFIVE_U_PRCI_DDRPLLCFG1 0x10 279fe640a5SBin Meng #define SIFIVE_U_PRCI_GEMGXLPLLCFG0 0x1C 289fe640a5SBin Meng #define SIFIVE_U_PRCI_GEMGXLPLLCFG1 0x20 299fe640a5SBin Meng #define SIFIVE_U_PRCI_CORECLKSEL 0x24 309fe640a5SBin Meng #define SIFIVE_U_PRCI_DEVICESRESET 0x28 319fe640a5SBin Meng #define SIFIVE_U_PRCI_CLKMUXSTATUS 0x2C 329fe640a5SBin Meng 339fe640a5SBin Meng /* 349fe640a5SBin Meng * Current FU540-C000 manual says ready bit is at bit 29, but 359fe640a5SBin Meng * freedom-u540-c000-bootloader codes (ux00prci.h) says it is at bit 31. 369fe640a5SBin Meng * We have to trust the actual code that works. 379fe640a5SBin Meng * 389fe640a5SBin Meng * see https://github.com/sifive/freedom-u540-c000-bootloader 399fe640a5SBin Meng */ 409fe640a5SBin Meng 419fe640a5SBin Meng #define SIFIVE_U_PRCI_HFXOSCCFG_EN (1 << 30) 429fe640a5SBin Meng #define SIFIVE_U_PRCI_HFXOSCCFG_RDY (1 << 31) 439fe640a5SBin Meng 449fe640a5SBin Meng /* xxxPLLCFG0 register bits */ 459fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG0_DIVR (1 << 0) 469fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG0_DIVF (31 << 6) 479fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG0_DIVQ (3 << 15) 489fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG0_FSE (1 << 25) 499fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG0_LOCK (1 << 31) 509fe640a5SBin Meng 519fe640a5SBin Meng /* xxxPLLCFG1 register bits */ 529fe640a5SBin Meng #define SIFIVE_U_PRCI_PLLCFG1_CKE (1 << 24) 539fe640a5SBin Meng 549fe640a5SBin Meng /* coreclksel register bits */ 559fe640a5SBin Meng #define SIFIVE_U_PRCI_CORECLKSEL_HFCLK (1 << 0) 569fe640a5SBin Meng 579fe640a5SBin Meng 589fe640a5SBin Meng #define SIFIVE_U_PRCI_REG_SIZE 0x1000 599fe640a5SBin Meng 609fe640a5SBin Meng #define TYPE_SIFIVE_U_PRCI "riscv.sifive.u.prci" 619fe640a5SBin Meng 62ac900edeSEduardo Habkost typedef struct SiFiveUPRCIState SiFiveUPRCIState; 63*e38d3c5cSEduardo Habkost DECLARE_INSTANCE_CHECKER(SiFiveUPRCIState, SIFIVE_U_PRCI, 64*e38d3c5cSEduardo Habkost TYPE_SIFIVE_U_PRCI) 659fe640a5SBin Meng 66ac900edeSEduardo Habkost struct SiFiveUPRCIState { 679fe640a5SBin Meng /*< private >*/ 689fe640a5SBin Meng SysBusDevice parent_obj; 699fe640a5SBin Meng 709fe640a5SBin Meng /*< public >*/ 719fe640a5SBin Meng MemoryRegion mmio; 729fe640a5SBin Meng uint32_t hfxosccfg; 739fe640a5SBin Meng uint32_t corepllcfg0; 749fe640a5SBin Meng uint32_t ddrpllcfg0; 759fe640a5SBin Meng uint32_t ddrpllcfg1; 769fe640a5SBin Meng uint32_t gemgxlpllcfg0; 779fe640a5SBin Meng uint32_t gemgxlpllcfg1; 789fe640a5SBin Meng uint32_t coreclksel; 799fe640a5SBin Meng uint32_t devicesreset; 809fe640a5SBin Meng uint32_t clkmuxstatus; 81ac900edeSEduardo Habkost }; 829fe640a5SBin Meng 839fe640a5SBin Meng /* 849fe640a5SBin Meng * Clock indexes for use by Device Tree data and the PRCI driver. 859fe640a5SBin Meng * 869fe640a5SBin Meng * These values are from sifive-fu540-prci.h in the Linux kernel. 879fe640a5SBin Meng */ 889fe640a5SBin Meng #define PRCI_CLK_COREPLL 0 899fe640a5SBin Meng #define PRCI_CLK_DDRPLL 1 909fe640a5SBin Meng #define PRCI_CLK_GEMGXLPLL 2 919fe640a5SBin Meng #define PRCI_CLK_TLCLK 3 929fe640a5SBin Meng 939fe640a5SBin Meng #endif /* HW_SIFIVE_U_PRCI_H */ 94