1380a37e4SHao Wu /* 2380a37e4SHao Wu * Nuvoton NPCM7xx MFT Module 3380a37e4SHao Wu * 4380a37e4SHao Wu * Copyright 2021 Google LLC 5380a37e4SHao Wu * 6380a37e4SHao Wu * This program is free software; you can redistribute it and/or modify it 7380a37e4SHao Wu * under the terms of the GNU General Public License as published by the 8380a37e4SHao Wu * Free Software Foundation; either version 2 of the License, or 9380a37e4SHao Wu * (at your option) any later version. 10380a37e4SHao Wu * 11380a37e4SHao Wu * This program is distributed in the hope that it will be useful, but WITHOUT 12380a37e4SHao Wu * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13380a37e4SHao Wu * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14380a37e4SHao Wu * for more details. 15380a37e4SHao Wu */ 16380a37e4SHao Wu #ifndef NPCM7XX_MFT_H 17380a37e4SHao Wu #define NPCM7XX_MFT_H 18380a37e4SHao Wu 19380a37e4SHao Wu #include "exec/memory.h" 20380a37e4SHao Wu #include "hw/clock.h" 21380a37e4SHao Wu #include "hw/irq.h" 22380a37e4SHao Wu #include "hw/sysbus.h" 23380a37e4SHao Wu #include "qom/object.h" 24380a37e4SHao Wu 25380a37e4SHao Wu /* Max Fan input number. */ 26380a37e4SHao Wu #define NPCM7XX_MFT_MAX_FAN_INPUT 19 27380a37e4SHao Wu 28380a37e4SHao Wu /* 29380a37e4SHao Wu * Number of registers in one MFT module. Don't change this without increasing 30380a37e4SHao Wu * the version_id in vmstate. 31380a37e4SHao Wu */ 32380a37e4SHao Wu #define NPCM7XX_MFT_NR_REGS (0x20 / sizeof(uint16_t)) 33380a37e4SHao Wu 34380a37e4SHao Wu /* 35380a37e4SHao Wu * The MFT can take up to 4 inputs: A0, B0, A1, B1. It can measure one A and one 36380a37e4SHao Wu * B simultaneously. NPCM7XX_MFT_INASEL and NPCM7XX_MFT_INBSEL are used to 37380a37e4SHao Wu * select which A or B input are used. 38380a37e4SHao Wu */ 39380a37e4SHao Wu #define NPCM7XX_MFT_FANIN_COUNT 4 40380a37e4SHao Wu 41380a37e4SHao Wu /** 42380a37e4SHao Wu * struct NPCM7xxMFTState - Multi Functional Tachometer device state. 43380a37e4SHao Wu * @parent: System bus device. 44380a37e4SHao Wu * @iomem: Memory region through which registers are accessed. 45380a37e4SHao Wu * @clock_in: The input clock for MFT from CLK module. 46380a37e4SHao Wu * @clock_{1,2}: The counter clocks for NPCM7XX_MFT_CNT{1,2} 47380a37e4SHao Wu * @irq: The IRQ for this MFT state. 48380a37e4SHao Wu * @regs: The MMIO registers. 49380a37e4SHao Wu * @max_rpm: The maximum rpm for fans. Order: A0, B0, A1, B1. 50380a37e4SHao Wu * @duty: The duty cycles for fans, relative to NPCM7XX_PWM_MAX_DUTY. 51380a37e4SHao Wu */ 52*c79aa350SPhilippe Mathieu-Daudé struct NPCM7xxMFTState { 53380a37e4SHao Wu SysBusDevice parent; 54380a37e4SHao Wu 55380a37e4SHao Wu MemoryRegion iomem; 56380a37e4SHao Wu 57380a37e4SHao Wu Clock *clock_in; 58380a37e4SHao Wu Clock *clock_1, *clock_2; 59380a37e4SHao Wu qemu_irq irq; 60380a37e4SHao Wu uint16_t regs[NPCM7XX_MFT_NR_REGS]; 61380a37e4SHao Wu 62380a37e4SHao Wu uint32_t max_rpm[NPCM7XX_MFT_FANIN_COUNT]; 63380a37e4SHao Wu uint32_t duty[NPCM7XX_MFT_FANIN_COUNT]; 64*c79aa350SPhilippe Mathieu-Daudé }; 65380a37e4SHao Wu 66380a37e4SHao Wu #define TYPE_NPCM7XX_MFT "npcm7xx-mft" 67*c79aa350SPhilippe Mathieu-Daudé OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxMFTState, NPCM7XX_MFT) 68380a37e4SHao Wu 69380a37e4SHao Wu #endif /* NPCM7XX_MFT_H */ 70