xref: /openbmc/qemu/include/hw/misc/mips_itu.h (revision db1015e92e04835c9eb50c29625fe566d1202dbd)
134fa7e83SLeon Alrae /*
234fa7e83SLeon Alrae  * Inter-Thread Communication Unit emulation.
334fa7e83SLeon Alrae  *
434fa7e83SLeon Alrae  * Copyright (c) 2016 Imagination Technologies
534fa7e83SLeon Alrae  *
634fa7e83SLeon Alrae  * This library is free software; you can redistribute it and/or
734fa7e83SLeon Alrae  * modify it under the terms of the GNU Lesser General Public
834fa7e83SLeon Alrae  * License as published by the Free Software Foundation; either
934fa7e83SLeon Alrae  * version 2 of the License, or (at your option) any later version.
1034fa7e83SLeon Alrae  *
1134fa7e83SLeon Alrae  * This library is distributed in the hope that it will be useful,
1234fa7e83SLeon Alrae  * but WITHOUT ANY WARRANTY; without even the implied warranty of
1334fa7e83SLeon Alrae  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
1434fa7e83SLeon Alrae  * Lesser General Public License for more details.
1534fa7e83SLeon Alrae  *
1634fa7e83SLeon Alrae  * You should have received a copy of the GNU Lesser General Public
1734fa7e83SLeon Alrae  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1834fa7e83SLeon Alrae  */
1934fa7e83SLeon Alrae 
2034fa7e83SLeon Alrae #ifndef MIPS_ITU_H
2134fa7e83SLeon Alrae #define MIPS_ITU_H
2234fa7e83SLeon Alrae 
23921e1a2aSPhilippe Mathieu-Daudé #include "hw/sysbus.h"
24*db1015e9SEduardo Habkost #include "qom/object.h"
25921e1a2aSPhilippe Mathieu-Daudé 
2634fa7e83SLeon Alrae #define TYPE_MIPS_ITU "mips-itu"
27*db1015e9SEduardo Habkost typedef struct MIPSITUState MIPSITUState;
2834fa7e83SLeon Alrae #define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU)
2934fa7e83SLeon Alrae 
3034fa7e83SLeon Alrae #define ITC_CELL_DEPTH_SHIFT 2
3134fa7e83SLeon Alrae #define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT)
3234fa7e83SLeon Alrae 
3334fa7e83SLeon Alrae typedef struct ITCStorageCell {
3434fa7e83SLeon Alrae     struct {
3534fa7e83SLeon Alrae         uint8_t FIFODepth; /* Log2 of the cell depth */
3634fa7e83SLeon Alrae         uint8_t FIFOPtr; /* Number of elements in a FIFO cell */
3734fa7e83SLeon Alrae         uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */
3834fa7e83SLeon Alrae         uint8_t T; /* Trap Bit */
3934fa7e83SLeon Alrae         uint8_t F; /* Full Bit */
4034fa7e83SLeon Alrae         uint8_t E; /* Empty Bit */
4134fa7e83SLeon Alrae     } tag;
4234fa7e83SLeon Alrae 
4334fa7e83SLeon Alrae     /* Index of the oldest element in the queue */
4434fa7e83SLeon Alrae     uint8_t fifo_out;
4534fa7e83SLeon Alrae 
4634fa7e83SLeon Alrae     /* Circular buffer for FIFO. Semaphore cells use index 0 only */
4734fa7e83SLeon Alrae     uint64_t data[ITC_CELL_DEPTH];
4834fa7e83SLeon Alrae 
4934fa7e83SLeon Alrae     /* Bitmap tracking blocked threads on the cell.
5034fa7e83SLeon Alrae        TODO: support >64 threads ? */
5134fa7e83SLeon Alrae     uint64_t blocked_threads;
5234fa7e83SLeon Alrae } ITCStorageCell;
5334fa7e83SLeon Alrae 
5434fa7e83SLeon Alrae #define ITC_ADDRESSMAP_NUM 2
5534fa7e83SLeon Alrae 
56*db1015e9SEduardo Habkost struct MIPSITUState {
5734fa7e83SLeon Alrae     /*< private >*/
5834fa7e83SLeon Alrae     SysBusDevice parent_obj;
5934fa7e83SLeon Alrae     /*< public >*/
6034fa7e83SLeon Alrae 
6134fa7e83SLeon Alrae     int32_t num_fifo;
6234fa7e83SLeon Alrae     int32_t num_semaphores;
6334fa7e83SLeon Alrae 
6434fa7e83SLeon Alrae     /* ITC Storage */
6534fa7e83SLeon Alrae     ITCStorageCell *cell;
6634fa7e83SLeon Alrae     MemoryRegion storage_io;
6734fa7e83SLeon Alrae 
6834fa7e83SLeon Alrae     /* ITC Configuration Tags */
6934fa7e83SLeon Alrae     uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM];
7034fa7e83SLeon Alrae     MemoryRegion tag_io;
71e5345d96SYongbok Kim 
72e5345d96SYongbok Kim     /* ITU Control Register */
73e5345d96SYongbok Kim     uint64_t icr0;
74e5345d96SYongbok Kim 
75043715d1SYongbok Kim     /* SAAR */
76043715d1SYongbok Kim     bool saar_present;
77043715d1SYongbok Kim     void *saar;
78043715d1SYongbok Kim 
79*db1015e9SEduardo Habkost };
8034fa7e83SLeon Alrae 
8134fa7e83SLeon Alrae /* Get ITC Configuration Tag memory region. */
8234fa7e83SLeon Alrae MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu);
8334fa7e83SLeon Alrae 
8434fa7e83SLeon Alrae #endif /* MIPS_ITU_H */
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