1*34fa7e83SLeon Alrae /* 2*34fa7e83SLeon Alrae * Inter-Thread Communication Unit emulation. 3*34fa7e83SLeon Alrae * 4*34fa7e83SLeon Alrae * Copyright (c) 2016 Imagination Technologies 5*34fa7e83SLeon Alrae * 6*34fa7e83SLeon Alrae * This library is free software; you can redistribute it and/or 7*34fa7e83SLeon Alrae * modify it under the terms of the GNU Lesser General Public 8*34fa7e83SLeon Alrae * License as published by the Free Software Foundation; either 9*34fa7e83SLeon Alrae * version 2 of the License, or (at your option) any later version. 10*34fa7e83SLeon Alrae * 11*34fa7e83SLeon Alrae * This library is distributed in the hope that it will be useful, 12*34fa7e83SLeon Alrae * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*34fa7e83SLeon Alrae * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*34fa7e83SLeon Alrae * Lesser General Public License for more details. 15*34fa7e83SLeon Alrae * 16*34fa7e83SLeon Alrae * You should have received a copy of the GNU Lesser General Public 17*34fa7e83SLeon Alrae * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18*34fa7e83SLeon Alrae */ 19*34fa7e83SLeon Alrae 20*34fa7e83SLeon Alrae #ifndef MIPS_ITU_H 21*34fa7e83SLeon Alrae #define MIPS_ITU_H 22*34fa7e83SLeon Alrae 23*34fa7e83SLeon Alrae #define TYPE_MIPS_ITU "mips-itu" 24*34fa7e83SLeon Alrae #define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU) 25*34fa7e83SLeon Alrae 26*34fa7e83SLeon Alrae #define ITC_CELL_DEPTH_SHIFT 2 27*34fa7e83SLeon Alrae #define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT) 28*34fa7e83SLeon Alrae 29*34fa7e83SLeon Alrae typedef struct ITCStorageCell { 30*34fa7e83SLeon Alrae struct { 31*34fa7e83SLeon Alrae uint8_t FIFODepth; /* Log2 of the cell depth */ 32*34fa7e83SLeon Alrae uint8_t FIFOPtr; /* Number of elements in a FIFO cell */ 33*34fa7e83SLeon Alrae uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */ 34*34fa7e83SLeon Alrae uint8_t T; /* Trap Bit */ 35*34fa7e83SLeon Alrae uint8_t F; /* Full Bit */ 36*34fa7e83SLeon Alrae uint8_t E; /* Empty Bit */ 37*34fa7e83SLeon Alrae } tag; 38*34fa7e83SLeon Alrae 39*34fa7e83SLeon Alrae /* Index of the oldest element in the queue */ 40*34fa7e83SLeon Alrae uint8_t fifo_out; 41*34fa7e83SLeon Alrae 42*34fa7e83SLeon Alrae /* Circular buffer for FIFO. Semaphore cells use index 0 only */ 43*34fa7e83SLeon Alrae uint64_t data[ITC_CELL_DEPTH]; 44*34fa7e83SLeon Alrae 45*34fa7e83SLeon Alrae /* Bitmap tracking blocked threads on the cell. 46*34fa7e83SLeon Alrae TODO: support >64 threads ? */ 47*34fa7e83SLeon Alrae uint64_t blocked_threads; 48*34fa7e83SLeon Alrae } ITCStorageCell; 49*34fa7e83SLeon Alrae 50*34fa7e83SLeon Alrae #define ITC_ADDRESSMAP_NUM 2 51*34fa7e83SLeon Alrae 52*34fa7e83SLeon Alrae typedef struct MIPSITUState { 53*34fa7e83SLeon Alrae /*< private >*/ 54*34fa7e83SLeon Alrae SysBusDevice parent_obj; 55*34fa7e83SLeon Alrae /*< public >*/ 56*34fa7e83SLeon Alrae 57*34fa7e83SLeon Alrae int32_t num_fifo; 58*34fa7e83SLeon Alrae int32_t num_semaphores; 59*34fa7e83SLeon Alrae 60*34fa7e83SLeon Alrae /* ITC Storage */ 61*34fa7e83SLeon Alrae ITCStorageCell *cell; 62*34fa7e83SLeon Alrae MemoryRegion storage_io; 63*34fa7e83SLeon Alrae 64*34fa7e83SLeon Alrae /* ITC Configuration Tags */ 65*34fa7e83SLeon Alrae uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM]; 66*34fa7e83SLeon Alrae MemoryRegion tag_io; 67*34fa7e83SLeon Alrae } MIPSITUState; 68*34fa7e83SLeon Alrae 69*34fa7e83SLeon Alrae /* Get ITC Configuration Tag memory region. */ 70*34fa7e83SLeon Alrae MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); 71*34fa7e83SLeon Alrae 72*34fa7e83SLeon Alrae #endif /* MIPS_ITU_H */ 73